US4138640A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Measuring arrangements for electrical currents
Assignee: QED Intellectual Property Ltd
•
Filing: 1976-04-30
•
Granted: 1979-02-06
•
Expires: 1996-04-30
Abstract
Abstract An arrangement for measuring electrical currents is described, having advantageous application to the measurement of the small currents obtained from photodiodes associated with radiation sensitive detectors in a computerized axial tomographic apparatus. The arrangement involves a technique which, in effect, performs a least squares analysis on variation of the current from a detector over each of a succession of predetermined time intervals.
Inventors
- 👤 Charles P. Cousins
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 09:36
CPC Classifications
G; G01; G01T; G01T1/00; G01T1/16; G01T1/17; A; A61; A61B; A61B6/00; A61B6/02; A61B6/03; A61B6/032; G01R; G01R19/00; G01R19/0092; Y; Y10; Y10S; Y10S378/00; Y10S378/901
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
107 words
A measuring arrangement for electrical current comprising an integrating circuit for receiving said current and for producing signals representative of the integral of said current during a prescribed time interval, means for producing factor signals indicative of a function which exhibits a known variation during said time interval, means for combining said signals representative of the integral of said current with corresponding ones of said factor signals to produce corresponding combined signals and a further integrating circuit for integrating said combined signals for a period substantially equal to said prescribed time interval, to obtain a statistical estimation of the mean value of said current over said period.
Claim 2
Dependent Claim
107 words
A measuring arrangement for electrical current comprising an integrating circuit for receiving said current and for producing signals representative of the integral of said current during a prescribed time interval, means for producing factor signals indicative of a function which exhibits a known variation during said time interval, means for combining said signals representative of the integral of said current with corresponding ones of said factor signals to produce corresponding combined signals and a further integrating circuit for integrating said combined signals for a period substantially equal to said prescribed time interval, to obtain a statistical estimation of the mean value of said current over said period.
Claim 3
Dependent Claim
33 words
An arrangement according to claim 1 wherein said combining means comprises a multiplying circuit for multiplying said signals representative of the integral of said current with said corresponding ones of said factor signals.
Claim 4
Dependent Claim
23 words
An arrangement according to claim 1 wherein said means for producing the factor signals produce factor signals which comprises a linear ramp-like waveform.
Claim 5
Dependent Claim
23 words
An arrangement according to claim 1 including a further multiplying circuit for multiplying the integrated and combined signals by a substantially constant factor.
Claim 6
Dependent Claim
46 words
An arrangement according to claim 1 including means for generating timing pulses at a frequency corresponding to said time interval and for utilising said timing pulses to control the application of said factor signals to said combining circuits and the integration period of said integrating means.
Claim 7
Dependent Claim
25 words
An arrangement according to claim 1 wherein said means for producing said factor signals comprises means for producing a stepped waveform representing said factor signals.
Claim 8
Dependent Claim
63 words
An arrangement according to claim 6 wherein the means for producing said stepped waveform produce steps with amplitude and polarity which tend to de-weight values of said current received by said first-mentioned integrating circuit toward the beginning of said prescribed time interval as compared with values of said current received by said mentioned integration circuit towards the end of said prescribed time interval.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-02-05 | 1982-08-07 | 1983-02-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-02-05 | 1986-08-07 | 1987-02-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-02-05 | 1990-08-07 | 1991-02-06 | $7700.00 | Window Closed / Lapsed |