US4138637A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Attenuator with compensation of impedance errors
Assignee: SIERRA NETWORKS Inc
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Filing: 1977-05-31
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Granted: 1979-02-06
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Expires: 1997-05-31
Abstract
Abstract Step attenuators wherein a number of individual attenuators are connected in series, with a switch across each individual attenuator, are well known. By opening and closing particular combinations of the switches, any one of a number of different values of attenuation may be selected. Each individual attenuator has in the past, as well as in the present invention, had a characteristic impedance equal to the impedance of both the signal generator (which feeds the input of the step attenuator) and the load (connected across the output of the step attenuator). However, the switches for selecting the individual attenuators may have substantial resistance especially where solid state switching diodes or mercury wetted reed relays are employed. The latter type switches display resistances caused by skin effect at highter frequencies. This causes inaccuracies of the attenuation steps due to mismatch, in prior art systems of the type described above. To avoid the mismatch, an additional impedance is added to the circuit, between each adjacent pair of attenuators, to form a network. The network includes the resistance of the switches. This network is designed to have a characteristic impedance equal to the characteristic impedance of each attenuator. Stated otherwise, it has the same characteristic impedance as the impedance of the signal generator and the impedance of the load.
Inventors
- 👤 Fritz K. Weinert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 14:09
CPC Classifications
H; H01; H01P; H01P1/00; H01P1/22; H01P1/225
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
92 words
An attenuator comprising an attenuator cell having an input and an output, said attenuator cell including means to give the cell a given characteristic impedance, a by-pass connected across said attenuator cell, and means including a switch for selection of said by-pass in place of said attenuator cell, said switch having inherent resistance, wherein the improvement comprises: impedance means connected to said switch to form at least one network, which network includes the inherent resistance of said switch, having a characteristic impedance equal to said given characteristic impedance of said attenuator cell.
Claim 2
Dependent Claim
92 words
An attenuator comprising an attenuator cell having an input and an output, said attenuator cell including means to give the cell a given characteristic impedance, a by-pass connected across said attenuator cell, and means including a switch for selection of said by-pass in place of said attenuator cell, said switch having inherent resistance, wherein the improvement comprises: impedance means connected to said switch to form at least one network, which network includes the inherent resistance of said switch, having a characteristic impedance equal to said given characteristic impedance of said attenuator cell.
Claim 3
Dependent Claim
121 words
An attenuator as defined in claim 1, having at least two attenuator cells forming a step attenuator, each said cell having said given characteristic impedance, the output of one of said attenuator cells feeding the input of the other, an individual by-pass for each of said at least two attenuators, said switching means including means for selecting either by-pass in place of its complementary attenuator cell, and including two switches between each of said at least two attenuator cells, said two switches being electrically interconnected, said impedance means having one end connected to the interconnection between said switches to form a network, which network includes the inherent resistances of said switches, having a characteristic impedance equal to said given characteristic impedance.
Claim 4
Dependent Claim
93 words
An attenuator as defined in claim 1 in which said switch is a single pole-double throw switch having three terminals, impedance means connected to each of the three terminals of the said single pole-double throw switch in which said impedance means forms with the said switch resistances two networks alternately connected to the single pole terminal of said switch, and which two networks have the same input and output characteristic impedances and which are equal to the said characteristic impedance of the attenuator cell, and which two said networks have the same attenuation.
Claim 5
Dependent Claim
21 words
An attenuator as defined in claim 1 in which said switch is a mercury wetted reed relay, single pole double throw.
Claim 6
Dependent Claim
38 words
An attenuator as defined in claim 1 in which said switch comprises two diodes, one in series with said by-pass and one in series with said attenuator cell, and means for biasing either of said diodes to cut-off.
Claim 7
Dependent Claim
65 words
An attenuator as defined in claim 5 having an additional single pole double throw switch, said last-named switch having two inputs either of which may be selected by said single pole of said additional switch, and impedance means connected to said additional switch to form, with said additional switch, a network having a characteristic impedance equal to said given characteristic impedance of the attenuator cell.
Claim 8
Dependent Claim
57 words
An attenuator as defined in claim 1 for attenuating a signal, said by-pass having an input and an output, said switch being single pole double throw, and having said single pole connected to receive said signal, said switch having two outputs respectively connected to said input of said attenuator cell and to the input of said by-pass.
Claim 9
Dependent Claim
118 words
In an attenuator cell, having an input and an output, a current path, from said input to said output, having resistor means in series with said current path, said resistor means comprising a resistor having input and output leads, said resistor means having inherent inductance, a ground, and shunt impedance means between said current path and ground to compensate the cell for said inherent inductance and to provide the cell with the desired impedance, said shunt impedance means including (a) shunt resistor means between said current path and ground, (b) first capacitive reactance means shunted between said input to the cell and ground, and (c) second capacitive reactance means shunted between the output of the cell and ground.
Claim 10
Dependent Claim
118 words
In an attenuator cell, having an input and an output, a current path, from said input to said output, having resistor means in series with said current path, said resistor means comprising a resistor having input and output leads, said resistor means having inherent inductance, a ground, and shunt impedance means between said current path and ground to compensate the cell for said inherent inductance and to provide the cell with the desired impedance, said shunt impedance means including (a) shunt resistor means between said current path and ground, (b) first capacitive reactance means shunted between said input to the cell and ground, and (c) second capacitive reactance means shunted between the output of the cell and ground.
Claim 11
Dependent Claim
53 words
In an attenuator cell as defined in claim 8, said ground comprising a metallic housing wall having at least one hole therethrough, said hole having a wall, at least one of said capacitive reactance means comprising a conductor passing through said hole, providing capacity between said conductor and the wall of said hole.
Claim 12
Dependent Claim
57 words
In an attenuator as defined in claim 8, said ground comprising a metallic housing wall having at least first and second holes therethrough, each hole being defined by a conducting wall, said first capacitive reactance means comprising a conductor passing through said first hole and said second reactance means comprising a conductor passing through said second hole.
Claim 13
Dependent Claim
42 words
In an attenuator cell as defined in claim 8, said shunt resistor means comprising two shunt resistors, one connected between the input of said first-named resistor and ground and the other being connected between the output of said first-named resistor and ground.
Claim 14
Dependent Claim
54 words
In an attenuator cell as defined in claim 11, said ground comprising a metallic housing wall having at least one hole therethrough, said hole having a conducting wall, at least one of said capacitive reactance means comprising a conductor passing through said hole, providing capacitance between said wire and the wall of said hole.
Claim 15
Dependent Claim
57 words
In an attenuator as defined in claim 11, said ground comprising a metallic housing wall having at least first and second holes therethrough, each hole being defined by a conducting wall, said first capacitive reactance means comprising a conductor passing through said first hole and said second reactance means comprising a conductor passing through said second hole.
Claim 16
Dependent Claim
25 words
In an attenuator as defined in claim 8, said first-named resistor having a mid-point, said shunt resistor means being connected between said mid-point and ground.
Claim 17
Dependent Claim
54 words
In an attenuator cell as defined in claim 14, said ground comprising a metallic housing wall having at least one hole therethrough, said hole having a conducting wall, at least one of said capacitive reactance means comprising a conductor passing through said hole, providing capacitance between said conductor and the wall of said hole.
Claim 18
Dependent Claim
57 words
In an attenuator as defined in claim 14, said ground comprising a metallic housing wall having at least first and second holes therethrough, each hole being defined by a conductive wall, said first capacitive reactance means comprising a conductor passing through said first hole and said second reactance means comprising a conductor passing through said second hole.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-02-05 | 1982-08-07 | 1983-02-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-02-05 | 1986-08-07 | 1987-02-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-02-05 | 1990-08-07 | 1991-02-06 | $7700.00 | Window Closed / Lapsed |