Forming isolation and device regions due to enhanced diffusion of impurities in semiconductor material by laser

Claim 2

A process for diffusing a dopant into a semiconductor material, comprising the steps of: forming at least one excavation in the semiconductor material with a laser beam; and diffusing the dopant through at least the one excavation into the semiconductor material.

Claim 3

The process as set forth in claim 1, which is further characterized by: depositing the dopant on the surface of the semiconductor prior to forming of each excavation to drive the dopant into the material to a first predetermined depth as the excavation is formed.

Claim 4

The process as set forth in claim 1, which is further characterized by: depositing the dopant into at least one excavation; and heating the semiconductor material and dopant to an elevated temperature for a time sufficient to diffuse the dopant into the semiconductor material to a predetermined depth.

Claim 5

The process as set forth in claim 2, which is further characterized by: heating the semiconductor material and dopant to an elevated temperature for a time sufficient to diffuse the dopant into the semiconductor material to a second predetermined depth.

Claim 6

The process as set forth in claim 4, wherein the elevated temperature is provided by a laser beam.

Claim 7

The process as set forth in claim 3, wherein the elevated temperature is provided by a laser beam.

Claim 8

A process for diffusing a dopant into a semiconductor wafer to form an isolation region therein, comprising the steps of: (a) growing an oxide coating on at least one major surface of the wafer; (b) directing a laser beam at the oxide coated wafer to form an excavation in the wafer and simultaneously remove portions of the oxide coating thereabove; (c) depositing the dopant on the oxide coated wafer to coat the oxide and fill the excavation; and (d) heating the wafer for a first time period at a temperature sufficient to diffuse the dopant in the excavation into the wafer to a first predetermined depth.

Claim 9

A process for diffusing a dopant into a semiconductor wafer to form an isolation region therein, comprising the steps of: (a) growing an oxide coating on at least one major surface of the wafer; (b) directing a laser beam at the oxide coated wafer to form an excavation in the wafer and simultaneously remove portions of the oxide coating thereabove; (c) depositing the dopant on the oxide coated wafer to coat the oxide and fill the excavation; and (d) heating the wafer for a first time period at a temperature sufficient to diffuse the dopant in the excavation into the wafer to a first predetermined depth.

Claim 10

The process as set forth in claim 7, comprising the additional steps of: (e) removing the residue of the oxide coating from the wafer surface; and (f) heating the wafer for a second time period at an elevated temperature sufficient to further diffuse the dopant in the wafer to a second predetermined depth to form the isolation region.

Claim 11

A process of forming a multitude of electrical semiconductor devices on a planar silicon substrate, each device having an active circuit portion surrounded by an isolation region, the process comprising the steps of: growing a silicon dioxide layer on at least one major surface of the substrate; forming a patterned grid array of excavations with a laser beam on at least one of the major surfaces of the substrate, the excavations extending through the silicon dioxide layer and into the substrate to a first predetermined depth; coating the substrate with a Boron doped oxide which covers the remaining silicon dioxide and fills the excavations; heating the coated substrate in a furnace to heat the substrate and the doped oxide to an elevated temperature for a time sufficient to diffuse the doped oxide in the excavations into the silicon substrate to a second predetermined depth; removing the wafer from the furnace to remove the doped oxide residue from the surface of the silicon dioxide layer and the excavations; further heating the silicon substrate in the furnace to heat the doped substrate to an elevated temperature for a time sufficient to further diffuse the doped oxide in the substrate to a third predetermined depth to form isolation regions; and fabricating the active portions of each device within the isolation regions to form the multitude of electrical semiconductor devices.

Claim 12

A process of forming a multitude of electrical semiconductor devices on a planar silicon substrate, each device having an active circuit portion surrounded by an isolation region, the process comprising the steps of: growing a silicon dioxide layer on at least one major surface of the substrate; forming a patterned grid array of excavations with a laser beam on at least one of the major surfaces of the substrate, the excavations extending through the silicon dioxide layer and into the substrate to a first predetermined depth; coating the substrate with a Boron doped oxide which covers the remaining silicon dioxide and fills the excavations; heating the coated substrate in a furnace to heat the substrate and the doped oxide to an elevated temperature for a time sufficient to diffuse the doped oxide in the excavations into the silicon substrate to a second predetermined depth; removing the wafer from the furnace to remove the doped oxide residue from the surface of the silicon dioxide layer and the excavations; further heating the silicon substrate in the furnace to heat the doped substrate to an elevated temperature for a time sufficient to further diffuse the doped oxide in the substrate to a third predetermined depth to form isolation regions; and fabricating the active portions of each device within the isolation regions to form the multitude of electrical semiconductor devices.

Claim 13

A process for diffusing a dopant into a semiconductor wafer to form an isolation region therein, comprising the steps of: (a) depositing a dopant on at least one major surface of the wafer; and (b) directing a laser beam at selected portions of the wafer to simultaneously form an excavation therein and diffuse portions of the dopant into the wafer to a first predetermined depth.

Claim 14

A process for diffusing a dopant into a semiconductor wafer to form an isolation region therein, comprising the steps of: (a) depositing a dopant on at least one major surface of the wafer; and (b) directing a laser beam at selected portions of the wafer to simultaneously form an excavation therein and diffuse portions of the dopant into the wafer to a first predetermined depth.

Claim 15

The process as set forth in claim 10, comprising the additional steps of: (c) removing the residue of the dopant from the surface of the wafer; and (d) heating the wafer for a period of time at a temperature sufficient to further diffuse the dopant in the wafer to a second predetermined depth to form the isolation region.

Claim 16

A process of forming a multitude of electrical semiconductor devices on a planar silicon substrate, each device having an active circuit portion surrounded by an isolation region, the process comprising the steps of: coating at least one of the major surfaces of the substrate with a Boron doped oxide; directing a high energy laser beam at selected areas of the substrate to form a patterned grid array of excavations while simultaneously diffusing portions of the boron doped oxide into the wafer to a first predetermined depth; removing the residue of the boron doped oxide from the surface of the wafer; placing the wafer in a furnace to heat the wafer to an elevated temperature for a time sufficient to diffuse the boron doped oxide therein to a second predetermined depth; and fabricating the active portions of each device within the isolation regions to form the multitude of electrical semiconductor devices.

Claim 17

A process of forming a multitude of electrical semiconductor devices on a planar silicon substrate, each device having an active circuit portion surrounded by an isolation region, the process comprising the steps of: coating at least one of the major surfaces of the substrate with a Boron doped oxide; directing a high energy laser beam at selected areas of the substrate to form a patterned grid array of excavations while simultaneously diffusing portions of the boron doped oxide into the wafer to a first predetermined depth; removing the residue of the boron doped oxide from the surface of the wafer; placing the wafer in a furnace to heat the wafer to an elevated temperature for a time sufficient to diffuse the boron doped oxide therein to a second predetermined depth; and fabricating the active portions of each device within the isolation regions to form the multitude of electrical semiconductor devices.