Patent US5884058A successfully refreshed from Google Patents.
US4136290A
Expired / Lapsed
US
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Josephson self gating and circuit and latch circuit
Assignee: International Business Machines Corp
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Filing: 1977-11-30
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Granted: 1979-01-23
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Expires: 1997-11-30
Abstract
Abstract A Josephson Self Gating And circuit which is powered by pulsed or clipped alternating current and provides true and complement outputs in response to true and complement inputs is disclosed. Inputs applied during the duration of the applied pulsed power or clipped alternating current are delivered to outputs which are maintained in that state in spite of a change of input within the given pulse duration. In one embodiment, the presence of an output signal interrupts a current path which, in turn, disables a pair of AND gates. These gates, even though the input to them changes, can provide no other output until the applied power falls to zero resetting the pair of AND gates which are latching in character. In another embodiment, current paths of one AND gate are cross-coupled with a current path of another AND gate. The interruption of current in a serially disposed Josephson device in one or the other of the current paths disables one or the other of the pair of AND gates preventing a change in outputs until the next cycle of applied pulsed or alternating current power. A latch circuit incorporating a pair of AND gates, a flip-flop and a Self Gating And circuit is also disclosed. The latch permits an input different from a previously applied input to the flip-flop to change the state of the flip-flop without changing the output of the Self Gating And during the application of a cycle of pulsed or alternating current power. The changed input to the flip-flop appears at the output of the Self Gating And circuit during the next cycle of applied pulsed or alternating current power.
Inventors
- 👤 Arthur Davidson
- 👤 Dennis J. Herrell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 20:17
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/195; H03K19/1952; G; G11; G11C; G11C11/00; G11C11/21; G11C11/44; H03K3/00; H03K3/02; H03K3/38; Y; Y10; Y10S; Y10S505/00; Y10S505/825; Y10S505/856; Y10S505/857; Y10S505/863; Y10S505/864
Claims Analysis
Total Claims: 35
Claim 1
Independent Claim
89 words
A self gating circuit comprising: a latching circuit which includes at least a pair of devices capable of carrying Josephson current which provide via output interconnection lines connected to said pair of devices true and complement outputs in response to true and complement inputs, a source of pulsed power of given pulse duration connected to said latching circuit, and, means for maintaining the outputs obtained in response to said true and complement inputs for said given pulse duration despite a change in said inputs within said given pulse duration.
Claim 2
Dependent Claim
89 words
A self gating circuit comprising: a latching circuit which includes at least a pair of devices capable of carrying Josephson current which provide via output interconnection lines connected to said pair of devices true and complement outputs in response to true and complement inputs, a source of pulsed power of given pulse duration connected to said latching circuit, and, means for maintaining the outputs obtained in response to said true and complement inputs for said given pulse duration despite a change in said inputs within said given pulse duration.
Claim 3
Dependent Claim
76 words
A self gating circuit according to claim 1 wherein said latching circuit includes a pair of circuits each including at least a pair of actuable devices capable of carrying Josephson current connected in parallel, and, a terminating load connected in parallel with each of said a pair of actuable devices via said an output interconnection line said load having a value of impedance sufficient to cause said pair of circuits to operate in a latching mode.
Claim 4
Dependent Claim
33 words
A self gating circuit according to claim 1 wherein said means for maintaining includes means for preventing said latching circuit from providing outputs different from those initially provided during said given pulse duration.
Claim 5
Dependent Claim
123 words
A self gating circuit according to claim 2 wherein said means for maintaining the outputs for said given pulse duration includes a current path disposed in series with a first one of said pair of actuable devices of one and the other of said pair of circuits, said current path of said one of said pair of circuits having a portion thereof disposed in electromagnetically coupled relationship with a second one of said pair of actuable devices of said other of said pair of circuits, said current path of said other of said pair of circuits having a portion thereof disposed in electromagnetically coupled relationship with a second one of said pair of actuable devices of said one of said pair of circuits.
Claim 6
Dependent Claim
136 words
A self gating circuit according to claim 2 wherein said means for maintaining the outputs for said given pulse duration includes a current path one portion of which is disposed in electromagnetically coupled relationship with one of said pair of actuable devices of one of said pair of circuits and another portion of which is disposed in electromagnetically coupled relationship with one of said pair of actuable devices of the other of said pair of circuits, at least one switchable device capable of carrying Josephson current disposed in said current path and in electromagnetically coupled relationship with each of said output interconnection lines, a terminating impedance disposed in parallel with said at least one switchable device and a source of pulsed power of pulse duration equal to said given pulse duration connected to said current path.
Claim 7
Dependent Claim
28 words
A self gating circuit according to claim 2 further including a flip-flop having input and output terminals the outputs of which are electrically coupled to said latching circuit.
Claim 8
Dependent Claim
23 words
A self gating circuit according to claim 2 wherein said source of pulsed power is connected to each of said pair of circuits.
Claim 9
Dependent Claim
66 words
A self gating circuit according to claim 6 further including means connected to said input terminals of said flip-flop for applying true and complement signals thereto and means electrically coupled to said means for applying for gating to said flip-flop during said given pulse duration newly applied true and complement signals which are different from those initially applied to said flip-flop during said given pulse duration.
Claim 10
Dependent Claim
22 words
A self gating circuit according to claim 7 wherein said source of pulsed power is a current source of unipolar current pulses.
Claim 11
Dependent Claim
21 words
A self gating circuit according to claim 7 wherein said source of pulsed power is a current source of alternating current.
Claim 12
Dependent Claim
22 words
A self gating circuit according to claim 7 wherein said source of pulsed power is a current source of alternating bipolar pulses.
Claim 13
Dependent Claim
63 words
A self gating circuit according to claim 8 wherein said means for applying includes a pair of AND gates each of which comprises an input terminal, first and second devices capable of carrying Josephson current connected in parallel, an output load, and, an interconnection line a portion of which is disposed in electromagnetically coupled relationship with said an input terminal of said flip-flop.
Claim 14
Dependent Claim
69 words
A self gating circuit according to claim 12 wherein said means for gating to said flip-flop includes a portion of said output interconnection lines disposed in electromagnetically coupled relationship with said second devices of said pair of AND gates to enable at least that one of said pair of AND gates to which a signal in the form of zero current was initially applied during said given pulse duration.
Claim 15
Dependent Claim
150 words
A self gating circuit comprising a pair of circuits each including at least a single actuable device capable of carrying Josephson current, a source of pulsed power of given pulse duration connected to each of said circuits, means connected to said circuits for applying true and complement inputs to one and the other, respectively, of said pair of circuits, a terminating load connected to each of said pair of circuits via an output interconnection line for providing true and complement outputs in response to said true and complement inputs within said given pulse duration said load having a value of impedance sufficient to cause said pair of circuits to operate in a latching mode, and, means interconnecting said pair of circuits for maintaining the outputs obtained in response to said true and complement inputs during said given pulse duration despite a change in said inputs within said given pulse duration.
Claim 16
Dependent Claim
150 words
A self gating circuit comprising a pair of circuits each including at least a single actuable device capable of carrying Josephson current, a source of pulsed power of given pulse duration connected to each of said circuits, means connected to said circuits for applying true and complement inputs to one and the other, respectively, of said pair of circuits, a terminating load connected to each of said pair of circuits via an output interconnection line for providing true and complement outputs in response to said true and complement inputs within said given pulse duration said load having a value of impedance sufficient to cause said pair of circuits to operate in a latching mode, and, means interconnecting said pair of circuits for maintaining the outputs obtained in response to said true and complement inputs during said given pulse duration despite a change in said inputs within said given pulse duration.
Claim 17
Dependent Claim
52 words
A self gating circuit according to claim 14 wherein said means for maintaining includes means for disabling one of said pair of curcuit when the other of said pair of circuit provides an output so that a change in said inputs within said given pulse duration is ineffective to change said outputs.
Claim 18
Dependent Claim
56 words
A self gating circuit according to claim 14 wherein said means connected to said circuits for applying true and complement inputs to one and the other of said pair of circuits includes a flip-flop having input and output terminals the outputs of which are electrically coupled to one and the other of said pair of circuits.
Claim 19
Dependent Claim
66 words
A self gating circuit according to claim 16 further including means connected to said input terminals of said flip-flop for applying true and complement signals thereto and means electrically coupled to said means for applying for gating to said flip-flop during said given pulse duration newly applied true and complement signals which are different from those initially applied to said flip-flop during said given pulse duration.
Claim 20
Dependent Claim
46 words
A self gating circuit according to claim 17 wherein said pair of circuits each includes at least a pair of actuable devices capable of carrying Josephson current connected in parallel, said terminating load being connected in parallel with said at least a pair of actuable devices.
Claim 21
Dependent Claim
122 words
A self gating circuit according to claim 18 wherein said means for maintaining one of said pair of circuits includes a current path disposed in series with a first one of said pair of actuable devices of one and the other of said pair of circuits, said current path of said one of said pair of circuits having a portion thereof disposed in electromagnetically coupled relationship with a second one of said pair of actuable devices of said other of said pair of circuits, said current path of said other of said pair of circuits having a portion thereof disposed in electromagnetically coupled relationship with a second one of said pair of actuable devices of said one of said pair of circuits.
Claim 22
Dependent Claim
136 words
A self gating circuit according to claim 18 wherein said means for maintaining one of said pair of circuits includes a current path one portion of which is disposed in electromagnetically coupled relationship with one of said pair of actuable devices of one of said pair of circuits and another portion of which is disposed in electromagnetically coupled relationship with one of said pair of actuable devices of the other of said pair of circuits, at least one switchable device capable of carrying Josephson current disposed in said current path and in electromagnetically coupled relationship with each of said an output interconnection lines, a terminating impedance disposed in parallel with said at least one switchable device and a source of pulsed power of pulse duration equal to said given pulse duration connected to said current path.
Claim 23
Dependent Claim
59 words
A self gating circuit according to claim 19 wherein said means for applying includes a pair of AND gates each of which comprises an input terminal, first and second Josephson devices connected in parallel, an output load, and, an interconnection line a portion of which is disposed in electromagnetically coupled relationship with said an input terminal of said flip-flop.
Claim 24
Dependent Claim
59 words
A self gating circuit according to claim 20 wherein said means for applying includes a pair of AND gates each of which comprises an input terminal, first and second Josephson devices connected in parallel, an output load, and, an interconnection line a portion of which is disposed in electromagnetically coupled relationship with said an input terminal of said flip-flop.
Claim 25
Dependent Claim
69 words
A self gating circuit according to claim 21 wherein said means for gating to said flip-flop includes a portion of said output interconnection lines disposed in electromagnetically coupled relationship with said second devices of said pair of AND gates to enable at least that one of said pair of AND gates to which a signal in the form of zero current was initially applied during said given pulse duration.
Claim 26
Dependent Claim
69 words
A self gating circuit according to claim 22 wherein said means for gating to said flip-flop includes a portion of said output interconnection lines disposed in electromagnetically coupled relationship with said second devices of said pair of AND gates to enable at least that one of said pair of AND gates to which a signal in the form of zero current was initially applied during said given pulse duration.
Claim 27
Dependent Claim
186 words
A latch circuit comprising: a latching circuit which includes at least a pair of devices capable of carrying Josephson current which provides via output interconnection lines connected to said pair of devices true and complement outputs in response to true and complement inputs which are applied to said circuit during a given interval, a flip-flop having input and output terminals the outputs of which are electrically coupled to said latching circuit, means connected to said input terminals of said flip-flop for applying true and complement signals thereto, means for maintaining the outputs obtained in response to said true and complement inputs for said given interval despite a change in said inputs within said given interval, means electrically coupled to said means for applying for gating to said flip-flop during said given interval newly applied true and complement signals which are different from those initially applied to said flip-flop during said given interval, and, a source of pulsed power of pulse duration equal to said given interval connected to said latching circuit and said means for applying and a source of d.c. power connected to said flip-flop.
Claim 28
Dependent Claim
186 words
A latch circuit comprising: a latching circuit which includes at least a pair of devices capable of carrying Josephson current which provides via output interconnection lines connected to said pair of devices true and complement outputs in response to true and complement inputs which are applied to said circuit during a given interval, a flip-flop having input and output terminals the outputs of which are electrically coupled to said latching circuit, means connected to said input terminals of said flip-flop for applying true and complement signals thereto, means for maintaining the outputs obtained in response to said true and complement inputs for said given interval despite a change in said inputs within said given interval, means electrically coupled to said means for applying for gating to said flip-flop during said given interval newly applied true and complement signals which are different from those initially applied to said flip-flop during said given interval, and, a source of pulsed power of pulse duration equal to said given interval connected to said latching circuit and said means for applying and a source of d.c. power connected to said flip-flop.
Claim 29
Dependent Claim
75 words
A latch circuit according to claim 25 wherein said latching circuit includes a pair of circuits each including at least a pair of actuable devices capable of carrying Josephson current connected in parallel, and, a terminating load connected in parallel with each of said a pair of actuable devices via said an output interconnection line said load having a value of impedance sufficient to cause said pair of circuits to operate in a latching mode.
Claim 30
Dependent Claim
62 words
A latch circuit according to claim 25 wherein said means for applying includes a pair of AND gates each of which comprises an input terminal, first and second devices capable of carrying Josephson current connected in parallel, an output load, and, an interconnection line a portion of which is disposed in electromagnetically coupled relationship with said an input terminal of said flip-flop.
Claim 31
Dependent Claim
66 words
A self gating circuit according to claim 25 wherein said means for gating includes a portion of said output interconnection lines disposed in electromagnetically coupled relationship with said second device of said pair of AND gates to enable at least that one of said pair of AND gates to which a signal in the form of zero current was initially applied during said given pulse duration.
Claim 32
Dependent Claim
20 words
A latch circuit according to claim 25 wherein said source of pulsed power is a source of clipped alternating current.
Claim 33
Dependent Claim
21 words
A latch circuit according to claim 25 wherein said source of pulsed power is a current source of unipolar current pulses.
Claim 34
Dependent Claim
135 words
A latch circuit according to claim 26 wherein said means for maintaining the outputs for said given pulse duration includes a current path one portion of which is disposed in electromagnetically coupled relationship with one of said pair of actuable devices of one of said pair of circuits and another portion of which is disposed in electromagnetically coupled relationship with one of said pair of actuable devices of the other of said pair of circuits, at least one switchable device capable of carrying Josephson current disposed in said current path and in electromagnetically coupled relationship with each of said output interconnection lines, a terminating impedance disposed in parallel with said at least one switchable device and a source of pulsed power of pulse duration equal to said given pulse duration connected to said current path.
Claim 35
Dependent Claim
122 words
A latch circuit according to claim 26 wherein said means for maintaining the outputs for said given pulse duration includes a current path disposed in series with a first one of said pair of actuable devices of one and the other of said pair of circuits, said current path of said one of said pair of circuits having a portion thereof disposed in electromagnetically coupled relationship with a second one of said pair of actuable devices of said other of said pair of circuits, said current path of said other of said pair of circuits having a portion thereof disposed in electromagnetically coupled relationship with a second one of said pair of actuable devices of said one of said pair of circuits.
References Cited (Backward Citations)
US3953749A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-01-22 | 1982-07-24 | 1983-01-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-01-22 | 1986-07-24 | 1987-01-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-01-22 | 1990-07-24 | 1991-01-23 | $7700.00 | Window Closed / Lapsed |