US4135162A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Power amplifier circuits
Assignee: Sansui Electric Co Ltd
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Filing: 1977-10-11
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Granted: 1979-01-16
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Expires: 1997-10-11
Abstract
Abstract A power amplifier circuit having a differential amplifier at an input stage and a following complementary symmetry circuit which is driven by a pair of opposite phase output signals of the differential amplifier as a push-pull circuit. One of the pair output signals is directly applied to a transistor of the complementary symmetry circuit and the other is applied to the other transistor of the complementary symmetry circuit through a phase-inverting transistor which forms a current mirror circuit together with a diode or a transistor being connected in the collector circuit of the transistor of the differential amplifier corresponding to the other output signal. So that the pair of opposite phase output signals are applied to two transistors of the complemeary symmetry circuit after being converted into in-phase signals. Because small current flows through the phase-inverting transistor similarly as transistors of the differential amplifier, a transistor of a small power capacity is used as the phase-inverting transistor. The power amplifier circuit is low in the cost, and the distortion, and is not affected by the ambient temperature variation and power source voltage variation.
Inventors
- 👤 Susumu Takahashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 08:01
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
223 words
In a power amplifier circuit including a differential amplifier having a pair of first and second transistors connected between positive and negative power lines, a complementary symmetry circuit having a pair of third and fourth transistors of opposite conductive type connected between said positive and negative power lines, with said third transistor directly connected to an output point of said first transistor thereby to drive said third transistor directly by a first output voltage signal of said differential amplifier, and a bias circuit for said fourth transistor comprising voltage dividing resistors connected between said positive and negative power lines, an improvement comprising, a fifth transistor directly connected to an output point of said second transistor to be driven by a second output signal in phase opposition to said first output signal of said differential amplifier, said fifth transitor being connected between said voltage dividing resistros in series therewith to phase-invert said second output signal and to couple said second output signal with said fourth transistor, and means for equalizing a current flowing through said fifth transistor with a current flowing through said second transistor to equalize the amplitude of the voltage signal applied to said fourth transistor with the amplitude of said first output voltage signal applied to said third transistor whereby said third and fourth transistors may operate as a push-pull amplifier.
Claim 2
Dependent Claim
223 words
In a power amplifier circuit including a differential amplifier having a pair of first and second transistors connected between positive and negative power lines, a complementary symmetry circuit having a pair of third and fourth transistors of opposite conductive type connected between said positive and negative power lines, with said third transistor directly connected to an output point of said first transistor thereby to drive said third transistor directly by a first output voltage signal of said differential amplifier, and a bias circuit for said fourth transistor comprising voltage dividing resistors connected between said positive and negative power lines, an improvement comprising, a fifth transistor directly connected to an output point of said second transistor to be driven by a second output signal in phase opposition to said first output signal of said differential amplifier, said fifth transitor being connected between said voltage dividing resistros in series therewith to phase-invert said second output signal and to couple said second output signal with said fourth transistor, and means for equalizing a current flowing through said fifth transistor with a current flowing through said second transistor to equalize the amplitude of the voltage signal applied to said fourth transistor with the amplitude of said first output voltage signal applied to said third transistor whereby said third and fourth transistors may operate as a push-pull amplifier.
Claim 3
Dependent Claim
59 words
The improvement as claimed in claim 1, wherein said current equalizing means comprises a diode which is so connected in series with said second transistor at the output side thereof that said second output signal is taken out at a point between said diode and said second transistor, said diode and said fifth transistor forming a current mirror circuit.
Claim 4
Dependent Claim
78 words
The improvement as claimed in claim 1, wherein said current equalizing means comprises a sixth transistor which is so connected in series with said second transistor at the output side thereof that said second output signal is taken out at a point between said sixth transistor and said second transistor, a control electrode of said sixth transistor being directly connected with a carrier deriving electrode thereof, said sixth transistor and said fifth transistor forming a current mirror circuit.
Claim 5
Dependent Claim
42 words
The improvement as claimed in claim 1, which further comprises a resistor means which is connected in series with said fifth transistor to share the power with said fifth transistor, said fifth transistor being of a transistor having a reduced power capacity.
Claim 6
Dependent Claim
20 words
The improvement as claimed in claim 4, wherein said resistor means is of a transistor having a base being grounded.
References Cited (Backward Citations)
US4021746A
Cited
US3995229A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-01-15 | 1982-07-17 | 1983-01-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-01-15 | 1986-07-17 | 1987-01-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-01-15 | 1990-07-17 | 1991-01-16 | $7700.00 | Window Closed / Lapsed |