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US4131860A Expired / Lapsed US ⏱️ 0.0 years remaining

Power amplifier arrangement automatically matched to service conditions

Assignee: Thales SA
•
Filing: 1977-12-27
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Granted: 1978-12-26
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Expires: 1997-12-27
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Abstract

Abstract A power amplifier arrangement comprising a first control circuit for keeping the power dissipated by its transistors below or equal, for any excitation level, to a limit fixed in dependence upon the required reliability level and a second control circuit for completely exploring the zone of available linear characteristics of the transistors in dependence upon the load conditions, the ambient temperature and parameters specific to the transistors.

Inventors

  • 👤 Jean-Jacques Fyot

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 04:12
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/20; H03F3/24; H03F3/245; H03F1/00; H03F1/02; H03F1/0205; H03F1/0211; H03F1/0216; H03F1/0233; H03F1/30; H03F1/307; H03F1/52; H03F2200/00; H03F2200/204; H03F2200/321; H03F2200/468

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 170 words
A linear power amplifier arrangement having a signal input and a signal output, and comprising : a power amplifier stage having an input, and an output connected to said signal output; a power supply for delivering a d.c. voltage V for feeding said amplifier stage, having an electrical control input of said value V; an attenuator having an electrical control input for control of its attenuation value and connecting said amplifier arrangement input to said amplifier stage input; a first control circuit for keeping said voltage V permanently equal to an optimal value V o corresponding to a power dissipated by said amplifier stage, irrespective of said value of attenuation, below a limit fixed in dependence upon predetermined reliability conditions; and a second control circuit for adjusting said attenuation value in order to ensure (i) to said output signal, a maximal peak voltage compatible with predetermined minimal linearity conditions of said amplifier arrangement (ii) to the average current I supplied by said power supply, a level below a predetermined value.
Claim 2
Dependent Claim 170 words
A linear power amplifier arrangement having a signal input and a signal output, and comprising : a power amplifier stage having an input, and an output connected to said signal output; a power supply for delivering a d.c. voltage V for feeding said amplifier stage, having an electrical control input of said value V; an attenuator having an electrical control input for control of its attenuation value and connecting said amplifier arrangement input to said amplifier stage input; a first control circuit for keeping said voltage V permanently equal to an optimal value V o corresponding to a power dissipated by said amplifier stage, irrespective of said value of attenuation, below a limit fixed in dependence upon predetermined reliability conditions; and a second control circuit for adjusting said attenuation value in order to ensure (i) to said output signal, a maximal peak voltage compatible with predetermined minimal linearity conditions of said amplifier arrangement (ii) to the average current I supplied by said power supply, a level below a predetermined value.
Claim 3
Dependent Claim 159 words
An amplifier arrangement as claimed in claim 1 intended for the amplification of amplitude modulated high frequency signals, wherein said amplifier stage is a class AB symmetrical amplification stage comprising an even number of identical transistors and wherein said amplifier arrangement further comprises sensors providing; three signals respectively characteristic of the power of the high frequency incident and reflected signals S i , S r delivered by said amplifier stage and of said average current I, a fourth signal characteristic of the ambient temperature θ and a fifth signal characteristic of said voltage V; said first circuit having five inputs for recving respectively said five signals and an output connected to said power supply control input and comprising first calculating means for working out said optimal value V o from first four signals of said signals, and from two fixed parameters respectively characteristic of the global thermal resistance R and the maximal permitted junction temperature T of said transistors.
Claim 4
Dependent Claim 123 words
An amplifier arrangement as claimed in claim 2 wherein said amplifier arrangement further comprises an additional sensor providing a sixth signal characteristic of the peak voltage V C of the high frequency signal developed at the collector of each of said transistors; said second circuit having five inputs for receiving said first, second, third and sixth signals, and an output connected to said attenuator control input, and comprising second calculating means for working out the maximal value of said peak voltage V C corresponding to V = V o , from said first second third and sixth signals and from the value of a fixed parameter characteristic of the gradient p of the saturation line of said transistors for low collector voltage values.
Claim 5
Dependent Claim 78 words
An amplifier arrangement as claimed in claim 3, wherein said first calculating means perform the operations 2√2/I√(S.sub.i - S.sub.r) T-θ/R of which the result is said optimal value V o which said first circuit has to make said power supply deliver and wherein said second calculating means perform the operations V.sub.C.sup.2 + 4/p (S.sub.i - S.sub.r) + π.sup. 2 I.sup.2 /4p.sup.2 of which the result has to be equal to V o 2 by adjusting said attenuation value.

References Cited (Backward Citations)

US3449680A Cited
US4057765A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-12-25 1982-06-26 1982-12-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-12-25 1986-06-26 1986-12-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-12-25 1990-06-26 1990-12-26 $7700.00 Window Closed / Lapsed

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