US4130765A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low supply voltage frequency multiplier with common base transistor amplifier
Assignee: Individual
•
Filing: 1977-05-31
•
Granted: 1978-12-19
•
Expires: 1997-05-31
Abstract
Abstract A frequency multiplier circuit utilizing a zero-crossing detector for producing a square wave at the frenquency of the input signal to generate harmonics of the input frequency. The square wave is filtered to generate a signal of a predetermined harmonic.
Inventors
- 👤 Rafi Arakelian
- 👤 Michael M. Driscoll
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:00
CPC Classifications
H; H03; H03B; H03B19/00; H03B19/06; H03B19/14
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
194 words
In a circuit for generating an output signal having a frequency equal to a multiple of the frequency of an input signal applied thereto, said circuit being of the type including a zero-crossing detector for providing a signal having frequency components at harmonics of said input signal frequency, and a filter for passing only predetermined ones of said harmonics, the improvement wherein: said zero-crossing detector comprises: first and second transistors, each having first and second electrodes defining a conduction path therebetween, and a control electrode, current flow through said conduction path being in accordance with the voltage difference between said control electrode and said second electrode; said input signal being applied to said first transistor control electrode; said first transistor first electrode being AC bypassed to ground potential to prevent thereby feedback between said first transistor first and control electrodes; said first and second transistor second electrodes being coupled to a common node; said second transistor control electrode being AC coupled to ground potential; and said second transistor first electrode being coupled to said filter, to provide for, thereby, operation from relatively low supply voltages of said circuit at frequencies in the VHF range.
Claim 2
Dependent Claim
194 words
In a circuit for generating an output signal having a frequency equal to a multiple of the frequency of an input signal applied thereto, said circuit being of the type including a zero-crossing detector for providing a signal having frequency components at harmonics of said input signal frequency, and a filter for passing only predetermined ones of said harmonics, the improvement wherein: said zero-crossing detector comprises: first and second transistors, each having first and second electrodes defining a conduction path therebetween, and a control electrode, current flow through said conduction path being in accordance with the voltage difference between said control electrode and said second electrode; said input signal being applied to said first transistor control electrode; said first transistor first electrode being AC bypassed to ground potential to prevent thereby feedback between said first transistor first and control electrodes; said first and second transistor second electrodes being coupled to a common node; said second transistor control electrode being AC coupled to ground potential; and said second transistor first electrode being coupled to said filter, to provide for, thereby, operation from relatively low supply voltages of said circuit at frequencies in the VHF range.
Claim 3
Dependent Claim
18 words
The circuit of claim 1 further including a common control electrode connected transistor amplifier coupled to said filter.
Claim 4
Dependent Claim
25 words
The circuit of claim 2 wherein said transistors are bipolar transistors and said first, second and control electrodes are respectively the collector, emitter and base.
Claim 5
Dependent Claim
25 words
The circuit of claim 1 wherein said transistors are bipolar transistors and said first, second and control electrodes are respectively the collector, emitter and base.
Claim 6
Dependent Claim
20 words
The circuit of claim 1 further including a differentiator circuit coupled between said second transistor first electrode and said filter.
Claim 7
Dependent Claim
42 words
The circuit of claim 1 further including an AC choke inductor coupled between the respective control electrodes of said first and second transistors to provide AC signal isolation between said respective control electrodes while maintaining said respective control electrodes at identical voltages.
Claim 8
Dependent Claim
167 words
A circuit for generating an output signal having a frequency equal to a predetermined multiple of the frequency of an input signal applied thereto, said circuit being capable of generating said output signal in the VHF range and comprising: first and second transistors, each having first and second electrodes defining a conductor path therebetween, and a control electrode, current flow through said conduction path being in accordance with the difference in potential between said second and control electrodes; said first transistor being connected in a common second electrode manner with respect to said input signal, and being receptive of a signal indicative of said input signal at the control electrode thereof; said second transistor being connected in a common control electrode manner with respect to said input signals, said second transistor second electrode being coupled to the first transistor second electrode; and a filter circuit, responsive to signals from said second transistor first electrode, for passing only signals having frequencies within predetermined limits from said multiple frequency.
Claim 9
Dependent Claim
167 words
A circuit for generating an output signal having a frequency equal to a predetermined multiple of the frequency of an input signal applied thereto, said circuit being capable of generating said output signal in the VHF range and comprising: first and second transistors, each having first and second electrodes defining a conductor path therebetween, and a control electrode, current flow through said conduction path being in accordance with the difference in potential between said second and control electrodes; said first transistor being connected in a common second electrode manner with respect to said input signal, and being receptive of a signal indicative of said input signal at the control electrode thereof; said second transistor being connected in a common control electrode manner with respect to said input signals, said second transistor second electrode being coupled to the first transistor second electrode; and a filter circuit, responsive to signals from said second transistor first electrode, for passing only signals having frequencies within predetermined limits from said multiple frequency.
Claim 10
Dependent Claim
20 words
The circuit of claim 7 further including a common control electrode connected transistor amplifier, receptive of signals from said filter.
Claim 11
Dependent Claim
25 words
The circuit of claim 8 wherein said transistors are bipolar transistors and said first, second and control electrodes are, respectively, the collector, emitter and base.
Claim 12
Dependent Claim
25 words
The circuit of claim 7 wherein said transistors are bipolar transistors and said first, second and control electrodes are, respectively, the collector, emitter and base.
Claim 13
Dependent Claim
16 words
The circuit of claim 10 wherein said first transistor collector is AC bypassed to ground potential.
Claim 14
Dependent Claim
17 words
The circuit of claim 7 wherein said first transistor first electrode is AC bypassed to ground potential.
Claim 15
Dependent Claim
20 words
The circuit of claim 7 further including a differentiator circuit coupled between said second transistor first electrode and said filter.
Claim 16
Dependent Claim
148 words
The circuit of claim 7 adapted to provide a further multiple of said input signal frequency, said circuit including: third and fourth transistors, each having first and second electrodes defining a conductor path therebetween, and a control electrode, current flow through said conduction path being in accordance with the difference in potential between said second and control electrodes; said third transistor being connected in a common second electrode manner with respect to said input signal, and being receptive of a signal from said filter circuit at the control electrode thereof; said fourth transistor being connected in a common control electrode manner with respect to said input signal, said second transistor second electrode being coupled to said third transistor second electrode; and a further filter circuit, responsive to signals from said fourth transistor first electrode, for passing only signals having frequencies within predetermined limits of said further multiple frequency.
Claim 17
Dependent Claim
23 words
The circuit of claim 14 further including a common control electrode connected transistor amplifier, responsive to signals passed by said further filter circuit.
Claim 18
Dependent Claim
42 words
The circuit of claim 7 further including an C choke inductor coupled between the respective control electrodes of said first and second transistors to provide AC signal isolation between said respective control electrodes while maintaining said respective control electrodes at identical voltages.
Claim 19
Dependent Claim
139 words
In a circuit for generating an output signal having a frequency equal to a predetermined multiple of the frequency of an input signal applied thereto, comprising: first and second and third transistors, each having first and second electrodes defining a conduction path therebetween, and a control electrode, current flow through said conduction path being in accordance with the voltage difference between said control electrode and said second electrode; said input signal being applied to said first transistor control electrode, said first and second transistor second electrodes being coupled to a common node, said second transistor control electrode being AC coupled to ground potential; a differentiator circuit responsive to signals from said second transistor first electrode; and a filter circuit, responsive to signals from said differentiator circuit for passing only signals having frequencies within predetermined limits of said predetermined multiple.
Claim 20
Dependent Claim
139 words
In a circuit for generating an output signal having a frequency equal to a predetermined multiple of the frequency of an input signal applied thereto, comprising: first and second and third transistors, each having first and second electrodes defining a conduction path therebetween, and a control electrode, current flow through said conduction path being in accordance with the voltage difference between said control electrode and said second electrode; said input signal being applied to said first transistor control electrode, said first and second transistor second electrodes being coupled to a common node, said second transistor control electrode being AC coupled to ground potential; a differentiator circuit responsive to signals from said second transistor first electrode; and a filter circuit, responsive to signals from said differentiator circuit for passing only signals having frequencies within predetermined limits of said predetermined multiple.
Claim 21
Dependent Claim
29 words
The circuit of claim 17 wherein said first transistor first electrode is AC bypassed to ground potential to prevent thereby feedback between said first transistor first and control electrodes.
Claim 22
Dependent Claim
25 words
The circuit of claim 18 wherein said transistors are bipolar transistors and said first, second and control electrodes are, respectively, the collector, emitter and base.
Claim 23
Dependent Claim
25 words
The circuit of claim 17 wherein said transistors are bipolar transistors and said first, second and control electrodes are, respectively, the collector, emitter and base.
Claim 24
Dependent Claim
86 words
A circuit for generating an output signal having a frequency equal to a predetermined multiple of the frequency of the input signal applied thereto comprising: a differential transistor pair current switch, responsive to zero-crossings in said input signal, for passing current alternately to one of two paths; a common base amplifier circuit, responsive to current in one of said alternate current paths; a filter circuit, responsive to signals from said amplifier circuit, for passing only signals having frequencies within predetermined limits of said predetermined multiple frequency.
Claim 25
Dependent Claim
86 words
A circuit for generating an output signal having a frequency equal to a predetermined multiple of the frequency of the input signal applied thereto comprising: a differential transistor pair current switch, responsive to zero-crossings in said input signal, for passing current alternately to one of two paths; a common base amplifier circuit, responsive to current in one of said alternate current paths; a filter circuit, responsive to signals from said amplifier circuit, for passing only signals having frequencies within predetermined limits of said predetermined multiple frequency.
Claim 26
Dependent Claim
55 words
The circuit of claim 21 wherein said current switch and said voltage amplifier comprise first and second transistors, respectively, each of said transistors having first and second electrodes defining a current path therebetween and a control electrode, current flow in said channel being in accordance with the potential difference across said control and second electrodes.
Claim 27
Dependent Claim
51 words
The circuit of claim 22 wherein said input signal is applied to said first transistor control electrode; said first and second transistor electrodes are coupled to a common node; said second transistor control electrode is AC coupled to ground potential; and said second transistor first electrode is coupled to said filter.
Claim 28
Dependent Claim
29 words
The circuit of claim 22 wherein said first transistor first electrode is AC bypassed to ground potential to prevent thereby feedback between said first transistor first and control electrodes.
References Cited (Backward Citations)
US3213293A
Cited
US3454792A
Cited
US3555303A
Cited
US3571627A
Cited
US3568034A
Cited
US3610956A
Cited
US3697782A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-12-18 | 1982-06-19 | 1982-12-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-12-18 | 1986-06-19 | 1986-12-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-12-18 | 1990-06-19 | 1990-12-19 | $7700.00 | Window Closed / Lapsed |