Circuit test apparatus

Claim 2

Apparatus for testing a circuit which is intended to be substantially identical to a reference circuit comprising, in combination: means for generating a periodic test waveform each period of which comprises a signal which varies through the same range of frequencies and at an impedance level which changes as the frequency changes and which is proportional to the frequency; means for applying the test waveform both to the reference circuit and the circuit under test; means for comparing the voltages developed at corresponding test points in the reference circuit and the circuit under test in response to said test waveform; and means for indicating the difference between said voltages.

Claim 3

The apparatus of claim 1 wherein said means for generating includes oscillator means for generating a plurality of signals each having a separate, different frequency at a fixed amplitude, and combining means for forming said signals into said test waveform.

Claim 4

The apparatus of claim 2 wherein said combining means includes first switch means for applying each said plurality of signals to a common output thereof, impedance means having a plurality of values each corresponding to a different one of said plurality of signals and second switch means for connecting said impedance means to said common output.

Claim 5

The apparatus of claim 1 wherein said means for generating includes means for generating said waveform at a substantially fixed amplitude.

Claim 6

A test circuit comprising: first, second, third and fourth nodes; a bridge comprising a first arm connected between the first and second nodes, and a fourth arm connected between the fourth and first nodes, said first and fourth arms comprising resistive arms of equal value; said second and third nodes serving as points between which a unit under test (UUT) may be connected, said UUT, when in place, serving as a second arm of said bridge; said third and fourth nodes serving as points between which a standard unit (STD) may be connected, said STD, when in place, serving as the third arm of said bridge; means for applying a periodic test signal between said first and third nodes which varies in frequency, during each period of said signal, over a range of frequencies; means for concurrently varying the resistance of said first and said fourth arms of said bridge in correspondence with and in the same sense as the variation in frequency of said test signal, while maintaining the resistance of said first and second arms equal to one another; and means coupled between said second and said fourth nodes for sensing any differences in voltage between said nodes.

Claim 7

A test circuit comprising: first, second, third and fourth nodes; a bridge comprising a first arm connected between the first and second nodes, and a fourth arm connected between the fourth and first nodes, said first and fourth arms comprising resistive arms of equal value; said second and third nodes serving as points between which a unit under test (UUT) may be connected, said UUT, when in place, serving as a second arm of said bridge; said third and fourth nodes serving as points between which a standard unit (STD) may be connected, said STD, when in place, serving as the third arm of said bridge; means for applying a periodic test signal between said first and third nodes which varies in frequency, during each period of said signal, over a range of frequencies; means for concurrently varying the resistance of said first and said fourth arms of said bridge in correspondence with and in the same sense as the variation in frequency of said test signal, while maintaining the resistance of said first and second arms equal to one another; and means coupled between said second and said fourth nodes for sensing any differences in voltage between said nodes.

Claim 8

A circuit test apparatus for comparing a reference circuit to a circuit under test comprising: first and second terminals adapted to be connected to a point of reference potential through said reference and test circuits, respectively; means for applying a first sinusoidal signal having a given amplitude and a first repetition rate to said first and second terminals through corresponding like first impedances; means for applying a second sinusoidal signal interleaved with said first signal and having said given amplitude and a second repetition rate different than said first rate to said first and second terminals through corresponding like second impedances different than said first impedances; and comparison means for comparing the signals appearing at said terminals.

Claim 9

A circuit test apparatus for comparing a reference circuit to a circuit under test comprising: first and second terminals adapted to be connected to a point of reference potential through said reference and test circuits, respectively; means for applying a first sinusoidal signal having a given amplitude and a first repetition rate to said first and second terminals through corresponding like first impedances; means for applying a second sinusoidal signal interleaved with said first signal and having said given amplitude and a second repetition rate different than said first rate to said first and second terminals through corresponding like second impedances different than said first impedances; and comparison means for comparing the signals appearing at said terminals.

Claim 10

A circuit test apparatus for comparing a known circuit to an unknown circuit comprising: means for generating a substantially sinusoidal test wave which varies in frequency, in N discrete steps, over a range of values, during each period of said test wave and which is of substantially constant amplitude; switch means; first and second terminals, said known circuit adapted to be connected between said first terminal and a point of reference potential and said unknown circuit adapted to be connected between said second terminal and said point of reference potential; a first plurality of N impedances each of different value, each connected in parallel between said switch means and said first terminal; a second plurality of N impedances of the same respective values as said first plurality of impedances, each connected in parallel between said switch means and said second terminal; control means operating said switch means for applying said test wave through said switch means to said impedances, in a repeating sequence, said switch means supplying said wave concurrently to an impedance in the first group and to the equal valued impedance in the second group, and the wave being applied to an impedance only during the time the frequency of the wave is at one discrete value, and then when the value of frequency changes to another discrete value, said control means operating said switch means so that it supplies the wave to another pair of impedances of equal value, the value of the impedance selected for receiving a particular frequency component of the wave being a function of the value of the frequency; and means connected to said terminals for sensing the difference in voltage developed between them.

Claim 11

A circuit test apparatus for comparing a known circuit to an unknown circuit comprising: means for generating a substantially sinusoidal test wave which varies in frequency, in N discrete steps, over a range of values, during each period of said test wave and which is of substantially constant amplitude; switch means; first and second terminals, said known circuit adapted to be connected between said first terminal and a point of reference potential and said unknown circuit adapted to be connected between said second terminal and said point of reference potential; a first plurality of N impedances each of different value, each connected in parallel between said switch means and said first terminal; a second plurality of N impedances of the same respective values as said first plurality of impedances, each connected in parallel between said switch means and said second terminal; control means operating said switch means for applying said test wave through said switch means to said impedances, in a repeating sequence, said switch means supplying said wave concurrently to an impedance in the first group and to the equal valued impedance in the second group, and the wave being applied to an impedance only during the time the frequency of the wave is at one discrete value, and then when the value of frequency changes to another discrete value, said control means operating said switch means so that it supplies the wave to another pair of impedances of equal value, the value of the impedance selected for receiving a particular frequency component of the wave being a function of the value of the frequency; and means connected to said terminals for sensing the difference in voltage developed between them.

Claim 12

The apparatus of claim 7 wherein said generating means includes: an oscillator; frequency divider means for forming a plurality of square waves at N different frequencies; amplifier means and; a plurality of N selectable feedback paths each related to a separate, different one of said frequencies each forming an integrator with said amplifier means; said control means placing each feedback path in circuit with said amplifier means concurrently with the generation of the wave whose frequency is related to that feedback path for integrating each said square wave.