Digital scan converter

Claim 1

A digital scan converter for displaying on a raster scan display video data provided by a radar sensor as a field of view is scanned in a predetermined pattern at a first scan rate, said converter comprising an input buffer for storing quantized video data at addresses corresponding to said predetermined pattern scanned at said first rate; a random access memory for storing data received from said input buffer, said random access memory comprising N × N submemories each having a × a memory elements and each being simultaneously accessible, wherein a range being considered at any given azimuth φ is divided into n segments each having k range increments Δr, where n ≦ N, so that the length k Δ r of each of said segments is equal to at least the range represented by "a" memory elements, multiplied by a factor √2; an address generating circuit for generating addresses as a function of said pattern and said first scanning rate to accommodate data read from said input buffer into said random-access memory at locations corresponding to a display line pattern to be produced on the raster scan display; said address generating circuit including an azimuth counter for generating signals representative of an azimuth φ, a sine/cosine generator coupled to said azimuth counter for generating signals representative of sin φ and cos φ, a start address generator coupled to said sine/cosine generator for producing start address values lk Δ r cos φ and lk Δ r sin φ, where l = 0, 1, 2, . . . , n-1, and an increment address generator for incrementing, during each random access memory cycle, each of n start addresses by Δr cos φ and Δr sin φ to thereby generate in k successive memory cycles the addresses x = x c + (lk+m) Δ r cos φ and y = y c + (lk+m) Δ r sin φ, where x c and y c represent the coordinates of the radar sensor position, l = 0, 1, 2, . . . , n-1 in each memory cycle, and m = 0, 1, 2, . . . , k-1, the data stored in said input buffer corresponding to the n ranges of which the addresses are defined in each memory cycle, being transferred to the x and y address-defined positions of said random-access memory in the respective memory cycle, allocating a position within one submemory by one address only; and a readout unit for reading out data stored in said random-access memory at a second rate for display on the raster scan display, the data for each picture line being read out simultaneously from the respective N submemories, said readout unit including means for storing data for at least one picture line which are read out in the sequence required for presentation on the raster scan display.