US4123723A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistor amplifier circuit
Assignee: Toshiba Corp
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Filing: 1977-07-07
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Granted: 1978-10-31
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Expires: 1997-07-07
Abstract
Abstract An amplifier circuit is provided with a first transistor receiving at the base an input signal and a second transistor related to its first transistor in complementary fashion. A first load resistor is provided between the base and the collector of the second transistor. A second load resistor is provided between the junction of the collector of the first transistor and the emitter of the second transistor and a power source. An output signal is taken out from the junction.
Inventors
- 👤 Tsutomu Sugawara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 08:08
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/32; H03F1/08; H03F1/083; H03F3/00; H03F3/50
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
178 words
A transistor amplifier circuit comprising: a first and a second power sources of which the polarities are opposite to each other; an input terminal; a first output terminal; a first transistor which is connected at the base to said input terminal and at the collector to said first output terminal; a second transistor related to said first transistor in complementary fashion, which said second transistor is connected at the base to the emitter of said first transistor and at the collector to said first power source and at the emitter to said first output terminal; first resistive means which is connected at one end to the emitter of said first transistor and at the other end to said first power source; second resistive means having much smaller resistance than that of said first resistive means, which said second resistive means is connected at one end to the connection point of the collector of said first transistor, the emitter of said second transistor and said first output terminal, and connected at the other end to the second power source.
Claim 2
Dependent Claim
178 words
A transistor amplifier circuit comprising: a first and a second power sources of which the polarities are opposite to each other; an input terminal; a first output terminal; a first transistor which is connected at the base to said input terminal and at the collector to said first output terminal; a second transistor related to said first transistor in complementary fashion, which said second transistor is connected at the base to the emitter of said first transistor and at the collector to said first power source and at the emitter to said first output terminal; first resistive means which is connected at one end to the emitter of said first transistor and at the other end to said first power source; second resistive means having much smaller resistance than that of said first resistive means, which said second resistive means is connected at one end to the connection point of the collector of said first transistor, the emitter of said second transistor and said first output terminal, and connected at the other end to the second power source.
Claim 3
Dependent Claim
24 words
A transistor amplifier circuit according to claim 1, wherein said first transistor is of NPN type and said second transistor is of PNP type.
Claim 4
Dependent Claim
24 words
A transistor amplifier circuit according to claim 1, wherein said first transistor is of PNP type and said second transistor is of NPN type.
Claim 5
Dependent Claim
54 words
A transistor amplifier circuit according to claim 1, further comprising a third resistive means connected between the emitter of said second transistor and the connection point of the collector of said first transistor, and said first resistive means, said third resistive means having a much smaller resistance than that of said second resistive means.
Claim 6
Dependent Claim
22 words
A transistor amplifier circuit according to claim 4, further comprising a second output terminal connected to the emitter of said second transistor.
References Cited (Backward Citations)
SU424312A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-10-30 | 1982-05-01 | 1982-10-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-10-30 | 1986-05-01 | 1986-10-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-10-30 | 1990-05-01 | 1990-10-31 | $7700.00 | Window Closed / Lapsed |