US4121141A
Expired / Lapsed
US
⏱️ 0.0 years remaining
D.C. motor speed control circuitry
Assignee: Fairchild Semiconductor Corp
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Filing: 1977-05-13
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Granted: 1978-10-17
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Expires: 1997-05-13
Abstract
Abstract A closed loop D.C. motor speed control circuit compares tachometer feed-back signals proportional to the D.C. motor speed with a voltage reference representing the desired motor speed and generates pulses for controlling a variable duty cycle switch in the motor circuit for maintaining a constant speed irrespective of line voltage variations and load changes.
Inventors
- 👤 Jerome A. Frazee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 04:51
CPC Classifications
H; H02; H02P; H02P7/00; H02P7/06; H02P7/18; H02P7/24; H02P7/28; H02P7/285; H02P7/29; H02P7/291
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
251 words
Circuitry for controlling the speed of a D.C. motor having means for generating an A.C. output signal proportional to the rotational speed of said motor, said control circuitry comprising: first operational amplifier means coupled to receive the A.C. output signal proportional to the rotational speed of said motor and coupled to a first source of reference potential to thereby generate first and a second square wave output signals, said first and said second square wave output signals being complementary to each other, and being at a frequency proportional to the frequency of said A.C. output signal; first integrating means coupled to the first operational amplifier means for integrating the second square wave signal; Or gate means coupled to the first integrating means and to the first operational amplifier means for combining the first square wave signal with the integrated second square wave signal; second operational amplifier means coupled to the OR gate means to receive the output signal therefrom and coupled to a second reference voltage source for producing a third square wave signal; second integrating means coupled to receive and integrate the signal from the second operational amplifier means; comparison means for comparing the integrated pulses from said integrating means with an adjustable D.C. speed control reference voltage; and variable duty cycle switching means in circuit with the D.C. motor, said switching means coupled to the output of said comparison means for conducting current through said motor when said speed control reference voltage exceeds the level of said integrated pulses.
Claim 2
Dependent Claim
251 words
Circuitry for controlling the speed of a D.C. motor having means for generating an A.C. output signal proportional to the rotational speed of said motor, said control circuitry comprising: first operational amplifier means coupled to receive the A.C. output signal proportional to the rotational speed of said motor and coupled to a first source of reference potential to thereby generate first and a second square wave output signals, said first and said second square wave output signals being complementary to each other, and being at a frequency proportional to the frequency of said A.C. output signal; first integrating means coupled to the first operational amplifier means for integrating the second square wave signal; Or gate means coupled to the first integrating means and to the first operational amplifier means for combining the first square wave signal with the integrated second square wave signal; second operational amplifier means coupled to the OR gate means to receive the output signal therefrom and coupled to a second reference voltage source for producing a third square wave signal; second integrating means coupled to receive and integrate the signal from the second operational amplifier means; comparison means for comparing the integrated pulses from said integrating means with an adjustable D.C. speed control reference voltage; and variable duty cycle switching means in circuit with the D.C. motor, said switching means coupled to the output of said comparison means for conducting current through said motor when said speed control reference voltage exceeds the level of said integrated pulses.
Claim 3
Dependent Claim
26 words
The circuitry claimed in claim 1 wherein said variable duty cycle switching means includes a high current switching transistor coupled in series with said D.C. motor.
Claim 4
Dependent Claim
19 words
The circuitry claimed in claim 2 wherein said switching transistor is coupled between said D.C. motor and ground reference.
Claim 5
Dependent Claim
41 words
The circuitry claimed in claim 2 wherein said variable duty switching means includes a high current flyback diode coupled across the terminals of said D.C. motor, the cathode of said diode being coupled to the positive D.C. terminal of said motor.
Claim 6
Dependent Claim
35 words
The circuitry claimed in claim 4 wherein said variable duty cycle switching means includes a darlington coupled transistor pair coupled to receive the output signals from said comparitor means and to drive said switching transistor.
Claim 7
Dependent Claim
32 words
Circuitry as claimed in claim 1 further including voltage limiting means coupled across the input terminals of said first operational amplifier means for limiting the amplitude of the A.C. signals applied thereto.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-10-16 | 1982-04-17 | 1982-10-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-10-16 | 1986-04-17 | 1986-10-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-10-16 | 1990-04-17 | 1990-10-17 | $7700.00 | Window Closed / Lapsed |