US4119808A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multi-frequency receiver circuits
Assignee: Arris Technology Inc
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Filing: 1977-06-15
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Granted: 1978-10-10
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Expires: 1997-06-15
Abstract
Abstract A receiver circuit for a multi-frequency telephone dialling system has means for validating a received tone by making successive measurements of the tone period and validating the tone when m of n successive measurements lie within a single one of a number of given ranges and when, subsequently, l(< m) of n successive measurements of the tone also lie within that single range.
Inventors
- 👤 Michael Frank Atkin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 15:34
CPC Classifications
H; H04; H04Q; H04Q1/00; H04Q1/18; H04Q1/30; H04Q1/44; H04Q1/444; H04Q1/45; H04Q1/457
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
163 words
A signal processor comprising: an input for receiving a periodic signal; measuring means coupled to the input for making successive measurements of the periodic signal to determine with each measurement whether the period of the signal has a value lying within any one of a plurality of predetermined spaced ranges of values; means coupled to the measuring means for producing an output signal if the determined value falls within a single one of the ranges more than a first predetermined number of times in a group of a given number of successive measurements and for continuing to produce said output signal if in the following such group the value falls within the same signal one of the ranges more than a second predetermined number of times less than the first predetermined number; and means for storing an identification of said single one of the ranges during the production of said output signal to provide an identification of the period of the periodic signal.
Claim 2
Dependent Claim
163 words
A signal processor comprising: an input for receiving a periodic signal; measuring means coupled to the input for making successive measurements of the periodic signal to determine with each measurement whether the period of the signal has a value lying within any one of a plurality of predetermined spaced ranges of values; means coupled to the measuring means for producing an output signal if the determined value falls within a single one of the ranges more than a first predetermined number of times in a group of a given number of successive measurements and for continuing to produce said output signal if in the following such group the value falls within the same signal one of the ranges more than a second predetermined number of times less than the first predetermined number; and means for storing an identification of said single one of the ranges during the production of said output signal to provide an identification of the period of the periodic signal.
Claim 3
Dependent Claim
68 words
A processor as claimed in claim 1, wherein the means for producing the output signal comprises a shift register having at least a number of stages equal to said given number of successive measurements and into which the results of the measurements are fed and gate means for detecting from the states of the stages of the register the first and the second predetermined number of successful measurements.
Claim 4
Dependent Claim
31 words
A processor as claimed in claim 1, wherein the given number of scucessive measurements is at least five, the first predetermined number is three and the second predetermined number is one.
Claim 5
Dependent Claim
53 words
A circuit for detecting two frequencies in respective ranges and comprising first and second signal processors each as claimed in claim 1 and means responsive to detect output signals from both processors, the values of the ranges of the first processor all being below the values of the ranges of the second processor.
Claim 6
Dependent Claim
28 words
A circuit as claimed in claim 4, wherein the responsive means produces a signal only when the output signals of the processors have existed for a predetermined time.
Claim 7
Dependent Claim
96 words
A processor as claimed in claim 1, wherein the measuring means comprises: input logic for producing from the periodic signal pulses defining the beginning and end of periods of the periodic signal; a period counter operable to produce a plurality of pulse trains defining respective ones of said ranges of values; and signal testing means connected to receive the pulses from the input logic and the trains from the period counter for making a comparison between the pulses and trains to determine which, if any, one of said ranges encompasses the period of the periodic signal.
Claim 8
Dependent Claim
68 words
A processor as claimed in claim 6, wherein the means for producing the output signal comprises a shift register having at least a number of stages equal to said given number of successive measurements and into which the results of the measurements are fed and gate means for detecting from the states of the stages of the register the first and the second predetermined number of successful measurements.
Claim 9
Dependent Claim
31 words
A processor as claimed in claim 7, wherein the given number of successive measurements is at least five, the first predetermined number is three and the second predetermined number is one.
Claim 10
Dependent Claim
53 words
A circuit for detecting two frequencies in respective ranges and comprising first and second signal processors each as claimed in claim 8 and means responsive to detect output signals from both processors, the values of the ranges of the first processor all being below the values of the ranges of the second processor.
Claim 11
Dependent Claim
28 words
A circuit as claimed in claim 9, wherein the responsive means produces a signal only when the output signals of the processors have existed for a predetermined time.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-10-09 | 1982-04-10 | 1982-10-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-10-09 | 1986-04-10 | 1986-10-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-10-09 | 1990-04-10 | 1990-10-10 | $7700.00 | Window Closed / Lapsed |