US4107651A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Glitch detector
Assignee: HP Inc
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Filing: 1976-11-08
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Granted: 1978-08-15
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Expires: 1996-11-08
Abstract
Abstract A method and circuit for detecting spurious transitions ("glitches", herein) upon a digital signal utilizes a test for such a glitch condition dependent upon the digital signal level and upon the polarity of subsequent transitions within a discrete sampling period to allow for the detection of any type of glitch. A simultaneous display for the sampled digital data and for the detected glitch information further allows a convenience to an operator analyzing the data. Further, the glitch detector is used as a trigger for retrieving selected portions of the sampled digital signal.
Inventors
- 👤 William Donald Martin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 16:51
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/25; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3177
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
118 words
A circuit for detecting glitches on a digital signal comprising: sampling means, coupled to receive the digital signal and having an output, for recurringly sampling the digital signal; and detection means, coupled to receive the digital signal and coupled to the output of said sampling means and having an output, for detecting a positive transition upon the digital signal during the interval between sequential samples sequent to sampling of a high level signal on the digital signal, for detecting a negative transition upon the digital signal during the interval between sequential samples sequent to sampling a low level signal on the digital signal, and for providing a signal upon the output responsive to the detection of such transitions.
Claim 2
Dependent Claim
118 words
A circuit for detecting glitches on a digital signal comprising: sampling means, coupled to receive the digital signal and having an output, for recurringly sampling the digital signal; and detection means, coupled to receive the digital signal and coupled to the output of said sampling means and having an output, for detecting a positive transition upon the digital signal during the interval between sequential samples sequent to sampling of a high level signal on the digital signal, for detecting a negative transition upon the digital signal during the interval between sequential samples sequent to sampling a low level signal on the digital signal, and for providing a signal upon the output responsive to the detection of such transitions.
Claim 3
Independent Claim
59 words
A method for displaying a digital signal and glitches on the digital signal simultaneously, comprising the steps of: recurringly sampling the digital signal; detecting glitches upon the digital signal; displaying the sampled digital signal as a function of time; indicating detected glitches by intensifying the display at the time corresponding to the sample subsequent to detection of a glitch.
Claim 4
Independent Claim
59 words
A method for displaying a digital signal and glitches on the digital signal simultaneously, comprising the steps of: recurringly sampling the digital signal; detecting glitches upon the digital signal; displaying the sampled digital signal as a function of time; indicating detected glitches by intensifying the display at the time corresponding to the sample subsequent to detection of a glitch.
Claim 5
Dependent Claim
124 words
A glitch trigger for a digital signal analyzer comprising: sampling means, coupled to receive the digital signal and having an output, for recurringly sampling the digital signal; glitch detection means, coupled to receive the digital signal and coupled to the output of said sampling means, for detecting glitches upon the digital signal; storage means, coupled to the output of said sampling means and coupled to the output of said glitch detection means, for storing a representation of selected segments of the sampled digital signal and the detected glitches; display means coupled to said glitch detection means and coupled to said storage means for displaying a selected segment of the sampled digital signal and the detected glitches in response to the detection of a glitch.
Claim 6
Dependent Claim
124 words
A glitch trigger for a digital signal analyzer comprising: sampling means, coupled to receive the digital signal and having an output, for recurringly sampling the digital signal; glitch detection means, coupled to receive the digital signal and coupled to the output of said sampling means, for detecting glitches upon the digital signal; storage means, coupled to the output of said sampling means and coupled to the output of said glitch detection means, for storing a representation of selected segments of the sampled digital signal and the detected glitches; display means coupled to said glitch detection means and coupled to said storage means for displaying a selected segment of the sampled digital signal and the detected glitches in response to the detection of a glitch.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-08-14 | 1982-02-13 | 1982-08-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-08-14 | 1986-02-13 | 1986-08-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-08-14 | 1990-02-13 | 1990-08-15 | $7700.00 | Window Closed / Lapsed |