Fsk demodulator

Claim 2

An FSK demodulator apparatus for receiving and demodulating an FSK-modulated signal that is transmitted with n transmitting frequencies made to correspond to n-level (n being a positive integer equal to or larger than 2) information signals, respectively, comprising a variable frequency oscillator whose frequency is variable in response to a control signal, a frequency converter circuit for converting said FSK-modulated signal into an intermediate frequency signal by means of an output of said oscillator, and means responsive to the output of said converter circuit for generating said n-level information signals and said control signal having at least n frequency-stable points which correspond to said n transmitting frequencies.

Claim 3

An FSK demodulator apparatus as claimed in claim 1, in which said signal generating means is composed of a delay circuit for delaying the output signal of said converter circuit for a period less than one signal period, a first phase detector for detecting a phase difference between the output signal of said converter circuit and the output signal of said delay circuit, a phase-shifter for phase-shifting the output signal of said delay circuit by 90°, a second phase detector for detecting a phase difference between the output signal of said converter circuit and the output signal of said phase-shifter, means for processing the output signals of at least said first and second phase detector circuits to derive said control signal at its output, and discriminator/shaper means for discriminating the output signal of said first phase detector circuit to derive said n-level information signals at its output.

Claim 4

An FSK demodulator apparatus as claimed in claim 2, in which said processing means consists of a multiplier circuit for multiplying the output signals of said first and second phase detector circuits.

Claim 5

An FSK demodulator apparatus as claimed in claim 2, in which said processing means consists of means for inverting the output signal of said second phase detector circuit depending upon whether the output signal of said first phase detector circuit is positive or negative.

Claim 6

An FSK demodulator apparatus as claimed in claim 2, in which said processing means consists of means for converting the output signals of said first and second phase detector circuits, respectively, into logic levels which correspond to the positive and negative values, respectively, of said output signals, and means for providing an Exclusive-OR function of the outputs of said level converting means and emitting its output as the output of said processing means.

Claim 7

An FSK demodulator apparatus as claimed in claim 1, in which said signal generating means is composed of means for discriminating said n frequencies out of the output signal of said converter circuit, discriminator/shaper means for discriminating the output signal of said discriminator means and deriving said n-level information signals at its output, an inverter circuit for inverting the polarity of the output of said discriminator means, and means for adding the output signal of said inverter circuit with the output signal of said discriminator/shaper means and emitting the sum as the output of said signal generating means.

Claim 8

An FSK demodulator apparatus as claimed in claim 1, in which said signal generating means is composed of a delay circuit for delaying the output of said converter circuit for a period less than one signal period, a first phase detector circuit for detecting a phase difference between the output signal of said converter circuit and the output signal of said delay circuit, a phase-shifter for phase-shifting the output signal of said delay circuit by 90°, a second phase detector circuit for detecting a phase difference between the output signal of said converter circuit and the output signal of said phase-shifter, a frequency discriminator circuit for discriminating the output frequency of said converter circuit in a step-like manner, means for processing the output signals of said first and second phase detector circuits and the output signal of said discriminator circuit to drive said control signal at its output, and discriminator/shaper means for discriminating the output signal of said first phase detector circuit to derive said n-level information signals at its output.

Claim 9

An FSK demodulator apparatus as claimed in claim 1, further comprising a sampling circuit provided between the output of said signal generator means and the input of said oscillator, which is operable in response to signals synchronized to said modulated signal.

Claim 10

An FSK demodulator apparatus for receiving and demodulating an FSK-modulated signal that is transmitted with n transmitting frequencies made to correspond to n-level (n being a positive integer equal to or larger than 2) information signals, respectively, comprising means for frequency-discriminating said modulated signal to derive at its output n-level discrimination signals which correspond to said n transmitting frequencies, a differential amplifier having the output of said discriminator circuit coupled to one of its input terminals, means responsive to the output signal of said amplifier for generating a signal having at least n level-stable points which correspond to said n-level discrimination signals, means for applying the output of said signal generating means to the other input terminal of said differential amplifier, and discriminator/shaper for discriminating the output signal of said amplifier to derive said n-level information signals.

Claim 11

An FSK demodulator apparatus for receiving and demodulating an FSK-modulated signal that is transmitted with n transmitting frequencies made to correspond to n-level (n being a positive integer equal to or larger than 2) information signals, respectively, comprising means for frequency-discriminating said modulated signal to derive at its output n-level discrimination signals which correspond to said n transmitting frequencies, a differential amplifier having the output of said discriminator circuit coupled to one of its input terminals, means responsive to the output signal of said amplifier for generating a signal having at least n level-stable points which correspond to said n-level discrimination signals, means for applying the output of said signal generating means to the other input terminal of said differential amplifier, and discriminator/shaper for discriminating the output signal of said amplifier to derive said n-level information signals.

Claim 12

An FSK demodulator apparatus as claimed in claim 9, in which said signal generating means in composed of an inverter circuit for inverting the polarity of the output signal of said differential amplifier, a level detector for detecting the output signal of said differential amplifier at a level, and means for adding the output signal of said inverter circuit with the output signal of said level detector and emitting the sum at the output of the signal generating means.

Claim 13

An FSK demodulator apparatus as claimed in claim 9, in which said means for applying the output of said signal generating means to the other input terminal of said differential amplifier consists of a sampling circuit that is operable in response to signals synchronized to said modulated signal.

Claim 14

In an FSK demodulator apparatus for receiving and demodulating an FSK-modulated signal that is transmitted with n transmitting frequencies made to correspond to signals formed by cutting off low frequency components from n-level digital signals containing a D.C. component, wherein the improvement in said apparatus comprises a negative feedback loop having at least n stable points which correspond to said n transmitting frequencies, the cut-off frequency of said negative feedback loop being selected higher than the cut-off frequency of said low frequency components.

Claim 15

In an FSK demodulator apparatus for receiving and demodulating an FSK-modulated signal that is transmitted with n transmitting frequencies made to correspond to signals formed by cutting off low frequency components from n-level digital signals containing a D.C. component, wherein the improvement in said apparatus comprises a negative feedback loop having at least n stable points which correspond to said n transmitting frequencies, the cut-off frequency of said negative feedback loop being selected higher than the cut-off frequency of said low frequency components.