US4101964A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital filter for pulse code modulation signals
Assignee: United States Department of the Army
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Filing: 1976-01-08
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Granted: 1978-07-18
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Expires: 1996-01-08
Abstract
Abstract A digital filter for pulse code modulation signals employs interpolation. A digital filter can handle a multiplicity of multiplexed pulse code modulation channels.
Inventors
- 👤 William L. Betts
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 18:15
CPC Classifications
H; H03; H03H; H03H17/00; H03H17/02; H03H17/06; H04; H04B; H04B14/00; H04B14/02; H04B14/04; H04B14/042
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
183 words
A digital filter for filtering a plurality of pulse code modulation signals appearing on separate input lines comprising: sampling means for sampling each said input line in succession; analog to digital means for sequentially converting the samples from said sampling means into digital form; a plurality of serially connected single stage registers wherein the number of registers is equal to the number of said input lines, having the input to said plurality of serially connected registers connected to the output of said analog to digital means; an adder means having one input connected to the output of said plurality of serially connected registers and a second input connected to the output of said analog to digital means for adding successive samples from a common one of said input lines and for adding samples from a different one of said input lines in succession; a dividing means responsive to the output from said adder for averaging the output from said adder by dividing said adder output by two; and digital to analog means for converting the averaged signal from said divider into analog form.
Claim 2
Dependent Claim
183 words
A digital filter for filtering a plurality of pulse code modulation signals appearing on separate input lines comprising: sampling means for sampling each said input line in succession; analog to digital means for sequentially converting the samples from said sampling means into digital form; a plurality of serially connected single stage registers wherein the number of registers is equal to the number of said input lines, having the input to said plurality of serially connected registers connected to the output of said analog to digital means; an adder means having one input connected to the output of said plurality of serially connected registers and a second input connected to the output of said analog to digital means for adding successive samples from a common one of said input lines and for adding samples from a different one of said input lines in succession; a dividing means responsive to the output from said adder for averaging the output from said adder by dividing said adder output by two; and digital to analog means for converting the averaged signal from said divider into analog form.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-07-17 | 1982-01-16 | 1982-07-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-07-17 | 1986-01-16 | 1986-07-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-07-17 | 1990-01-16 | 1990-07-18 | $7700.00 | Window Closed / Lapsed |