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US4101842A Expired / Lapsed US ⏱️ 0.0 years remaining

Differential amplifier

Assignee: Sony Corp
•
Filing: 1977-09-01
•
Granted: 1978-07-18
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Expires: 1997-09-01
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Abstract

Abstract A differential amplifier includes differentially connected transistors, a first current mirror circuit used as an active load of the differentially connected transistors, and a second current mirror circuit connected to the common emitter side of the differentially connected transistors so as to reduce an off-set DC current that may be produced at the output terminal of the differentially connected transistors.

Inventors

  • 👤 Mitsuo Ohsawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 19:17
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/34; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45479; H03G1/00; H03G1/04

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 351 words
A differential amplifier comprising: first and second differentially connected transistors each having base, emitter and collector electrodes, at least one input terminal, means connecting each said input terminal with the base electrode of a respective one of said differentially connected transistors, at least one output terminal, and means connecting each said output terminal with the collector electrode of a respective one of said differentially connected transistors; first current mirror circuit means including third, fourth and fifth transistors and a P-N junction, each of said third, fourth and fifth transistors having base, emitter and collector electrodes, said P-N junction being connected in parallel with the base-emitter junctions of said third, fourth and fifth transistors and having the same polarity as said base-emitter junctions, a first reference DC terminal, means connecting said emitter electrode of each of said third, fourth and fifth transistors to said first reference DC terminal, and means connecting each said output terminal to the collector electrode of a respective one of said third and fourth transistors; second current mirror circuit means including first, second and third pairs of Darlington-connected transistors each having base, emitter and collector electrodes, said first and second pairs of Darlington-connected transistors having the collector electrodes thereof connected in common to the emitter electrodes of said first and second differentially connected transistors, each of said pairs of Darlington-connected transistors having the emitter electrode of one of the transistors thereof connected to the base electrode of the other transistor of the respective pair, a second reference DC terminal connected to the emitter electrodes of said other transistors of said pairs of Darlington-connected transistors, and means connecting together the base electrodes of said one transistors of said first, second and third pairs of Darlington-connected transistors; circuit means connecting said collector electrode of said other transistor of said third pair of Darlington-connected transistors to said base electrode of said one transistor of said third pair of Darlington-connected transistors and to the collector electrode of said fifth transistor; and current source means connected to said P-N junction at the side of the latter remote from said first reference DC terminal.
Claim 2
Dependent Claim 351 words
A differential amplifier comprising: first and second differentially connected transistors each having base, emitter and collector electrodes, at least one input terminal, means connecting each said input terminal with the base electrode of a respective one of said differentially connected transistors, at least one output terminal, and means connecting each said output terminal with the collector electrode of a respective one of said differentially connected transistors; first current mirror circuit means including third, fourth and fifth transistors and a P-N junction, each of said third, fourth and fifth transistors having base, emitter and collector electrodes, said P-N junction being connected in parallel with the base-emitter junctions of said third, fourth and fifth transistors and having the same polarity as said base-emitter junctions, a first reference DC terminal, means connecting said emitter electrode of each of said third, fourth and fifth transistors to said first reference DC terminal, and means connecting each said output terminal to the collector electrode of a respective one of said third and fourth transistors; second current mirror circuit means including first, second and third pairs of Darlington-connected transistors each having base, emitter and collector electrodes, said first and second pairs of Darlington-connected transistors having the collector electrodes thereof connected in common to the emitter electrodes of said first and second differentially connected transistors, each of said pairs of Darlington-connected transistors having the emitter electrode of one of the transistors thereof connected to the base electrode of the other transistor of the respective pair, a second reference DC terminal connected to the emitter electrodes of said other transistors of said pairs of Darlington-connected transistors, and means connecting together the base electrodes of said one transistors of said first, second and third pairs of Darlington-connected transistors; circuit means connecting said collector electrode of said other transistor of said third pair of Darlington-connected transistors to said base electrode of said one transistor of said third pair of Darlington-connected transistors and to the collector electrode of said fifth transistor; and current source means connected to said P-N junction at the side of the latter remote from said first reference DC terminal.
Claim 3
Dependent Claim 20 words
A differential amplifier according to claim 1; in which each of said first and second transistors in an NPN-type transistor.
Claim 4
Dependent Claim 21 words
A differential amplifier according to claim 2; in which each of said third, fourth and fifth transistors in a PNP-type transistor.
Claim 5
Dependent Claim 20 words
A differential amplifier according to claim 3; in which said P-N junction is constituted by a diode connected PNP-type transistor.
Claim 6
Dependent Claim 15 words
A differential amplifier according to claim 4; in which said Darlington-connected transistors are NPN-type transistors.
Claim 7
Dependent Claim 31 words
A differential amplifier according to claim 5; in which a third reference DC terminal is connected to the collector electrode of said one transistor of the third pair of Darlington-connected transistors.
Claim 8
Dependent Claim 40 words
A differential amplifier according to claim 6; in which said collector electrode of the other transistor of said third pair of Darlington-connected transistors is connected directly to said base electrode of said one transistor of said third-pair of Darlington-connected transistors.
Claim 9
Dependent Claim 79 words
A differential amplifier according to claim 6; in which said circuit means connecting the collector and base electrodes of said other and one transistors, respectively, of said third pair of Darlington-connected transistors includes an additional transistor having base and emitter electrodes connected to said collector and base electrodes, respectively, of said other and one transistor, respectively, of said third pair of Darlington-connected transistors, and said additional transistor further has a collector electrode connected to said third reference DC terminal.

References Cited (Backward Citations)

US3904976A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-07-17 1982-01-16 1982-07-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-07-17 1986-01-16 1986-07-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-07-17 1990-01-16 1990-07-18 $7700.00 Window Closed / Lapsed

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