US4099215A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Security apparatus for the protection of electric machines
Assignee: Individual
•
Filing: 1976-02-02
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Granted: 1978-07-04
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Expires: 1996-02-02
Abstract
Abstract The present invention relates to a security apparatus connected to the circuit of a machine in order to detect the presence of a fault therein such as a short circuit or loss of insulation between a power line and ground. The security apparatus comprises a tripping circuit having at least one transistor which is normally nonconductive and becomes conductive only when a fault current is fed to its base. The collector current activates a circuit breaking device and/or a signalling device which are continuously energized. The security apparatus operates, depending on its mode of connection, in response to a relatively small detected fault current resulting, for example, from defective insulation or from a short circuit. The security provided is irrespective of the state of the ground of the apparatus being protected.
Inventors
- 👤 Jean Parrier
- 👤 Henri Parrier
- 👤 Andre Parrier
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 10:32
CPC Classifications
H; H02; H02H; H02H3/00; H02H3/14; G; G01; G01R; G01R31/00; G01R31/50; G01R31/52; H02H3/16; H02H3/162; H02H3/165
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
136 words
A security circuit for detecting an electrical defect of a machine under supervision comprising: latch circuit means for generating an output signal in response to an input signal, said latch circuit means having an initial state not generating said output signal and switchable to a latched state generating said output signal in response to said input signal; semiconductor circuit means in circuit relationship with said latch circuit means for generating said input signal in response to a fault signal indicative of an electrical defect of the machine; fault signal generating means in circuit relationship with the machine for generating said fault current in response to an electrical defect of said machine, said fault signal generating means including a polarized high resistance having one end connected to ground to bias said fault signal with respect to ground.
Claim 2
Dependent Claim
136 words
A security circuit for detecting an electrical defect of a machine under supervision comprising: latch circuit means for generating an output signal in response to an input signal, said latch circuit means having an initial state not generating said output signal and switchable to a latched state generating said output signal in response to said input signal; semiconductor circuit means in circuit relationship with said latch circuit means for generating said input signal in response to a fault signal indicative of an electrical defect of the machine; fault signal generating means in circuit relationship with the machine for generating said fault current in response to an electrical defect of said machine, said fault signal generating means including a polarized high resistance having one end connected to ground to bias said fault signal with respect to ground.
Claim 3
Dependent Claim
63 words
The apparatus of claim 1 wherein said semiconductor circuit means includes at least one transistor having a collector connected to said latch circuit means, an emitter connected to said ground and a base and wherein said high resistance is connected between said base and said ground, and said input signal is a current flow from the collector to the emitter of said transistor.
Claim 4
Dependent Claim
50 words
The apparatus of claim 1 wherein said latch circuit means includes a latching relay having a coil energizing a normally open switch to connect the output end of said relay coil to said ground and the ground signal at the output end of said relay coil is said output signal.
Claim 5
Dependent Claim
15 words
The apparatus of claim 1 wherein said latch circuit means is a semiconductor latching circuit.
Claim 6
Dependent Claim
17 words
The apparatus of claim 1 further including an alarm network energized in response to said output signal.
Claim 7
Dependent Claim
72 words
The apparatus of claim 1 wherein said semiconductor circuit means includes a first and a second transistor, the base of said first transistor connected to ground and the emitter of the second transistor through an adjustable potentiometer; the emitter of the first transistor is connected to the base of the second transistor and the collectors of said first and second transistors are connected together as well as to said latch circuit means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-07-03 | 1982-01-02 | 1982-07-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-07-03 | 1986-01-02 | 1986-07-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-07-03 | 1990-01-02 | 1990-07-04 | $7700.00 | Window Closed / Lapsed |