Information storage facility with multiple level processors

Claim 1

A multi-level information storage facility for storing data base information in digital form and for enabling symbolic access to such information in response to information request signals from an external processing device, said facility comprising: a communications level processor means having an input/output port means for receiving said information request signals from said external processing device, said communications level processor means including means for initiating internal processing of said request signals and means for generating acknowledgment signals for transmission to said external processing device via said input/output port means; an intermediate level processor means for providing intermediate level processing of said request signals; first shared memory means coupled to said communications level and said intermediate level processor means for enabling data communication therebetween, said first shared memory means including a first cache memory device for storing initiating request signals generated by said communications level processor means and for storing resultant task signals generated by said intermediate level processor means; said intermediate level processor means including seek means for interrogating said first cache memory device in a predetermined sequence for said initiating request signals, means for generating intermediate level instruction signals in response to the detection of said initiating request signals, and means for storing said resultant task signals in said first cache memory device; storage level processor means having an input/output port means adapted to be coupled to a data storage device for controlling operation thereof; and second shared memory means coupled to said intermediate level and said storage level processor means for enabling data communication therebetween, said second shared memory means including a second cache memory device for storing said intermediate level instruction signals from said intermediate level processor means and for storing data received from said storage level processor means; said storage level processor means including means for interrogating said second cache memory device for said intermediate level instruction signals, means for generating storage level instruction signals in response to the detection of said intermediate level instruction signals for controlling storage and retrieval of portions of said data base information from said storage device, and means for storing said data received from said storage device in said second cache memory device.