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US4096514A Expired / Lapsed US ⏱️ 0.0 years remaining

Playback circuit for a recorded three-line sequential color television signal

Assignee: Deutsche Thomson OHG
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Filing: 1976-09-10
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Granted: 1978-06-20
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Expires: 1996-09-10
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Abstract

Abstract In a playback circuit for a three-line sequential color television signal, which includes a memory presenting four outputs providing, respectively, the undelayed sequential signal and the sequential signal delayed by one, two and three horizontal picture line scanning periods, a combining arrangement connected to the four outputs to combine the signals thereat into a difference signal, and a further combining arrangement for adding the difference signal to the original three-line sequential signal, the circuit is simplified by constructing the memory to cause the signals at its four outputs to have identical amplitudes and by combining the signals at the four outputs of the memory by means of four electrically identical combining components, the undelayed sequential signal and the signal delayed by three picture lines having their polarities reversed relative to the signals delayed by one and two picture lines.

Inventors

  • 👤 Werner Scholz

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 00:39
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/79; H04N9/80; H04N9/86; H04N11/00; H04N11/06; H04N11/20; H04N11/22

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 201 words
In a playback circuit for a three-line sequential color television signal, which circuit includes memory means composed of three delay lines connected together in series, each delay line producing a signal time delay equal to one horizontal picture line scanning period, means connecting one end of the resulting series arrangement of the memory means to receive the color television signal, means connected to the one end of the series arrangement and to the output of each delay line to present four outputs providing, the undelayed sequential signal and the sequential signal delayed by one, two and three horizontal picture lines, respectively, means connected to the four outputs to combine the signals thereat into a difference signal, and means connected for adding the difference signal to the three-line sequential signal, the improvement wherein: said memory means are constructed for causing the signals at said four outputs to have identical amplitudes; and means connected to combine the signals comprise four electrically identical combining components each connected to a respective one of said outputs and means connected for reversing the polarity of the undelayed signal and the signal delayed by three picture lines relative to the signals delayed by one and two picture lines.
Claim 2
Dependent Claim 201 words
In a playback circuit for a three-line sequential color television signal, which circuit includes memory means composed of three delay lines connected together in series, each delay line producing a signal time delay equal to one horizontal picture line scanning period, means connecting one end of the resulting series arrangement of the memory means to receive the color television signal, means connected to the one end of the series arrangement and to the output of each delay line to present four outputs providing, the undelayed sequential signal and the sequential signal delayed by one, two and three horizontal picture lines, respectively, means connected to the four outputs to combine the signals thereat into a difference signal, and means connected for adding the difference signal to the three-line sequential signal, the improvement wherein: said memory means are constructed for causing the signals at said four outputs to have identical amplitudes; and means connected to combine the signals comprise four electrically identical combining components each connected to a respective one of said outputs and means connected for reversing the polarity of the undelayed signal and the signal delayed by three picture lines relative to the signals delayed by one and two picture lines.
Claim 3
Dependent Claim 37 words
An arrangement as defined in claim 1 further comprising an amplifier and wherein each of said combining components is a resistor connected between a respective output of said memory means and a common input of said amplifier.
Claim 4
Dependent Claim 34 words
An arrangement as defined in claim 1 further comprising means connected to define a feedback path between the output of the last of said delay lines and said one end of said series arrangement.
Claim 5
Dependent Claim 21 words
An arrangement as defined in claim 1 connected to receive the three-line sequential signal from a video record disc playback device.

References Cited (Backward Citations)

US3871019A Cited
DE2446376A1 Cited
US4052736A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-06-19 1981-12-19 1982-06-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-06-19 1985-12-19 1986-06-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-06-19 1989-12-19 1990-06-20 $7700.00 Window Closed / Lapsed

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