US4095095A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for manufacturing semiconductor devices
Assignee: Toshiba Corp
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Filing: 1977-03-30
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Granted: 1978-06-13
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Expires: 1997-03-30
Abstract
Abstract On the surface of a semiconductor wafer there is formed a binary-coded pattern which has high and low reflection portions and which contains an item of wafer processing information. A scanning device is provided to scan such patterns on individual wafers in order to obtain items of scanned information. Further a control device is provided to store the items of wafer processing information. Upon receipt of an item of scanning information, the control device produces a control signal which corresponds to the item of scanning information. The control signal is supplied to one of wafer processors, which effects on the semiconductor wafer the process necessary to manufacture a semiconductor device.
Inventors
- 👤 Hisashi Muraoka
- 👤 Teruo Yoneyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 23:26
CPC Classifications
G; G06; G06K; G06K7/00; G06K7/10; G06K7/10544; G06K7/10821; G06K7/10861; G03; G03F; G03F9/00; G03F9/70; H; H10; H10W; H10W46/00; H10W46/501
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
154 words
An apparatus for manufacturing semiconductor devices, comprising: a scanning device for scanning a binary-coded pattern formed on a selected region of a semiconductor wafer, having high and low reflection portions and containing an item of wafer processing information based on which a semiconductor device is to be manufactured in the semiconductor wafer, thereby to obtain an item of scanned information; a control apparatus for storing a plurality of items of wafer processing information and reading out, in response to an item or scanned information from said scanning device, an item of wafer processing information which corresponds to the item of scanned information, thereby to produce a control signal corresponding to the item of wafer processing information thus read out; and at least one wafer processor for processing, upon receipt of the control signal from said control apparatus, the wafer in accordance with the item of wafer processing information which corresponds to the control signal.
Claim 2
Independent Claim
154 words
An apparatus for manufacturing semiconductor devices, comprising: a scanning device for scanning a binary-coded pattern formed on a selected region of a semiconductor wafer, having high and low reflection portions and containing an item of wafer processing information based on which a semiconductor device is to be manufactured in the semiconductor wafer, thereby to obtain an item of scanned information; a control apparatus for storing a plurality of items of wafer processing information and reading out, in response to an item or scanned information from said scanning device, an item of wafer processing information which corresponds to the item of scanned information, thereby to produce a control signal corresponding to the item of wafer processing information thus read out; and at least one wafer processor for processing, upon receipt of the control signal from said control apparatus, the wafer in accordance with the item of wafer processing information which corresponds to the control signal.
Claim 3
Dependent Claim
19 words
The apparatus according to claim 1, wherein said scanning device uses a laser beam to scan the binary-coded pattern.
Claim 4
Dependent Claim
14 words
The apparatus according to claim 1, wherein said scanning device includes a television camera.
Claim 5
Dependent Claim
20 words
The apparatus according to claim 1, wherein said binary-coded pattern contains an identification mark for distinguishing the wafer from others.
Claim 6
Dependent Claim
72 words
The apparatus according to claim 1, wherein said binary-coded pattern is a composite pattern which consists of a first pattern storing a first item of wafer processing information and a second pattern formed in addition to the first pattern upon completion of a first wafer process corresponding to the first pattern, said composite pattern storing a second item of wafer processing information based on which a second wafer process is carried out.
Claim 7
Dependent Claim
46 words
The apparatus according to claim 1, wherein said binary-coded pattern comprises a plurality of polycrystal silicon layers arranged in a specific pattern on said selected region of the semiconductor wafer, said polycrystal silicon layers serving as said low reflection portions in respect of the illuminating light.
Claim 8
Dependent Claim
46 words
The apparatus according to claim 1, wherein said binary-coded pattern comprises a plurality of silicon dioxide layers arranged in a specific pattern on said selected region of the semiconductor wafer, said silicon dioxide layers serving as said low reflection portions in respect of the illuminating light.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-06-12 | 1981-12-12 | 1982-06-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-06-12 | 1985-12-12 | 1986-06-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-06-12 | 1989-12-12 | 1990-06-13 | $7700.00 | Window Closed / Lapsed |