← Back to Patent Explorer
US4095053A Expired / Lapsed US ⏱️ 0.0 years remaining

Quasi-pulse stuffing synchronization

Assignee: AT&T Inc
•
Filing: 1977-09-01
•
Granted: 1978-06-13
•
Expires: 1997-09-01
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract In a digital communication system, synchronization of a plurality of asynchronous digital signals is usually achieved by stuffing one or more pulses in a pulse stream. Thereby, stuffing equalizes the input signal bit rate with the usually fixed bit rate of a signal on a transmission link. For example, in pulse stuffing, single pulses are added at certain allowed times to equalize the input bit rate with the transmission link bit rate. On the other hand, in block stuffing, a block of pulses is added. However, conventional block stuffing usually requires a narrowband phase-locked loop for removing jitter in the received signal. As a result, slower acquisition of synchronization occurs. To mitigate this and other problems in a block oriented system, an improved arrangement, called quasi-pulse stuffing synchronization, employs block stuffing at a transmitter and pulse destuffing at a receiver in combination with a control signal for identifying when a digital signal would have been pulse stuffed if the system were employing pulse stuffing. Thereby, jitter can be removed using a conventional widerband, pulse stuffing phase-locked loop.

Inventors

  • 👤 Donald Lars Duttweiler
  • 👤 Allan Michael Hofmann

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 21:37
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/07; H04J3/062

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 130 words
Synchronization apparatus including apparatus for extending a digital signal from an input terminal through an elastic store to an output terminal and including pulse stuffer apparatus coupled to said extending apparatus for providing a stuff bit signal responsive to the detection of a request to insert a pulse in said digital signal, and CHARACTERIZED IN THAT said synchronization apparatus further comprises quasi-pulse stuffing means for mitigating signal distortion, said quasi-pulse stuffing means including means for detecting a predetermined number of said stuff bit signals, means responsive to the detection of said predetermined number for providing a stuff block signal, means responsive to said stuff block signal for stuffing a block in said digital signal and means adapted for extending said stuff block and said stuff bit signals to a desynchronizer.
Claim 2
Dependent Claim 130 words
Synchronization apparatus including apparatus for extending a digital signal from an input terminal through an elastic store to an output terminal and including pulse stuffer apparatus coupled to said extending apparatus for providing a stuff bit signal responsive to the detection of a request to insert a pulse in said digital signal, and CHARACTERIZED IN THAT said synchronization apparatus further comprises quasi-pulse stuffing means for mitigating signal distortion, said quasi-pulse stuffing means including means for detecting a predetermined number of said stuff bit signals, means responsive to the detection of said predetermined number for providing a stuff block signal, means responsive to said stuff block signal for stuffing a block in said digital signal and means adapted for extending said stuff block and said stuff bit signals to a desynchronizer.
Claim 3
Dependent Claim 67 words
The synchronization apparatus defined in claim 1 wherein said desynchronizer comprises input means adapted to receive said digital signal, means for extending said received digital signal through a second elastic store to a second output terminal, said receive extending means being responsive to said stuff block and said stuff bit signals for destuffing said digital signal whereby block stuffing occurs responsive to a pulse stuffing control signal.
Claim 4
Dependent Claim 37 words
The synchronization apparatus defined in claim 2 wherein said second elastic store is written responsive to said stuff block signal and read responsive to a read signal, said read signal being responsive to said stuff bit signal.
Claim 5
Dependent Claim 38 words
The synchronization apparatus defined in claim 3 wherein said read signal is provided by apparatus substantially similar to read signal providing apparatus includable in said pulse stuffer apparatus were said digital signal pulse stuffed rather than word stuffed.

References Cited (Backward Citations)

US3461245A Cited
US3830981A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-06-12 1981-12-12 1982-06-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-06-12 1985-12-12 1986-06-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-06-12 1989-12-12 1990-06-13 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag