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US4095048A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of synchronizing a pulse code modulation (pcm) junction and an arrangement for applying this method

Assignee: Thales SA
•
Filing: 1976-06-15
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Granted: 1978-06-13
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Expires: 1996-06-15
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Abstract

Abstract The invention provides a method of synchronization of a junction in a pulse-code modulation (PCM) transmission network where any two multiplexing-demultiplexing stations equipped with independents clocks have to be brought into synchronism. For this purpose, the pulse trains (T.I.) of the PCM junction are alternatively recorded on two parallel channels A and B (registers RPA and RPB) and then memorized in a frame memory (MTR) by repeating the reading of the register when a risk of error is detected by comparison of the clocks. Means are provided for relocating the T.I. containing the multiframe locking code and the first frame of multiframe.

Inventors

  • 👤 Claude Athenes
  • 👤 Jean Pierre Landez

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 22:08
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/05; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/062; H04J3/0626; H04Q; H04Q11/00; H04Q11/04

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 204 words
In a PCM switching network wherein time intervals comprise n bits, a junction synchronization system in a local switching center equipped with a local clock connected with a distant switching center equipped with a distant clock, comprising: means for comparing said local and said distant clock signals; means for detecting the risk of error which occurs when a n-bit register loaded at the frequency of the distant clock is read at the frequency of said local clock; means for successively recording at the frequency of said distant clock the pulse trains relating to the successive channels of one and the same frame alternately in a register A and in a register B; means for counting the time intervals at the frequency of said local clock and determining the time of correction; means for carrying out said correction by repeating the reading of one of the two registers A and B at the frequency of said local clock; means for recording the time intervals in a frame memory; means for detecting the loss of a frame locking code; and means for shifting the pulse trains recorded in said registers A and B in successive jumps of one bit until said frame locking code is detected.
Claim 2
Dependent Claim 204 words
In a PCM switching network wherein time intervals comprise n bits, a junction synchronization system in a local switching center equipped with a local clock connected with a distant switching center equipped with a distant clock, comprising: means for comparing said local and said distant clock signals; means for detecting the risk of error which occurs when a n-bit register loaded at the frequency of the distant clock is read at the frequency of said local clock; means for successively recording at the frequency of said distant clock the pulse trains relating to the successive channels of one and the same frame alternately in a register A and in a register B; means for counting the time intervals at the frequency of said local clock and determining the time of correction; means for carrying out said correction by repeating the reading of one of the two registers A and B at the frequency of said local clock; means for recording the time intervals in a frame memory; means for detecting the loss of a frame locking code; and means for shifting the pulse trains recorded in said registers A and B in successive jumps of one bit until said frame locking code is detected.
Claim 3
Dependent Claim 50 words
A system as claimed in claim 1 further comprising: means for detecting a multiframe locking signal; means for counting the frames; means for detecting the first frame of a multiframe; and means for recording the time intervals containing signalling data at the time of the detection of the first frame.
Claim 4
Dependent Claim 170 words
In a PCM-connection between a local center and a distant center equipped respectively with a local clock and a distant clock, a method for synchronizing in the local center one n-channel digital group comprising: performing a synchronizing operation on entry into the local center, loading alternately the incoming information into two registers A and B at the frequency of the distant clock and alternately removing the incoming information from the two registers at the frequency of the local clock; receiving the information coming from the registers A and B in a parallel-series register and feeding the information from the parallel-series register in series to a frame memory at the frequency of the local clock; repeating the reading of the register which is in the process of being read when the local clock is quicker and repeating the reading of the other register when the local clock is slower; shifting the incoming information by one bit as many times as is necessary to synchronize the time intervals of the PCM connection.
Claim 5
Dependent Claim 170 words
In a PCM-connection between a local center and a distant center equipped respectively with a local clock and a distant clock, a method for synchronizing in the local center one n-channel digital group comprising: performing a synchronizing operation on entry into the local center, loading alternately the incoming information into two registers A and B at the frequency of the distant clock and alternately removing the incoming information from the two registers at the frequency of the local clock; receiving the information coming from the registers A and B in a parallel-series register and feeding the information from the parallel-series register in series to a frame memory at the frequency of the local clock; repeating the reading of the register which is in the process of being read when the local clock is quicker and repeating the reading of the other register when the local clock is slower; shifting the incoming information by one bit as many times as is necessary to synchronize the time intervals of the PCM connection.

References Cited (Backward Citations)

US3989894A Cited
US3928726A Cited
US3928727A Cited
US3992580A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-06-12 1981-12-12 1982-06-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-06-12 1985-12-12 1986-06-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-06-12 1989-12-12 1990-06-13 $7700.00 Window Closed / Lapsed

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