US4085499A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making a MOS-type semiconductor device
Assignee: Panasonic Holdings Corp
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Filing: 1976-12-27
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Granted: 1978-04-25
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Expires: 1996-12-27
Abstract
Abstract A method of making an MOS-type semiconductor device wherein the surface thereon for the conductors is flat. For this purpose, a polycrystalline silicon layer is provided and a part of the layer is selectively oxidized, so that the remaining portion of the layer acts as a lead for connecting a functional region such as a source region, a drain region etc. with the conductor layer. When said oxidization is performed, the diffusion from the polycrystalline silicon layer into the substrate occurs due to heating, so that said functional regions are formed at the same time.
Inventors
- 👤 Shigeo Kuninobu
- 👤 Takeshi Ishihara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 15:07
CPC Classifications
H; H10; H10P; H10P32/00; H10P32/10; H10P32/17; H10P32/171; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6304; H10P14/6306; H10P14/6308; H10P32/14; H10P32/1408; H10P32/1414; Y; Y10; Y10S; Y10S148/00; Y10S148/136; Y10S438/00; Y10S438/965
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
205 words
A method of making an MOS-type semiconductor device, comprising the steps of: forming a SiO 2 layer on a silicon substrate; selectively etching the SiO 2 layer to form openings which are located in correspondence to regions where functional regions are to be formed in the silicon substrate; coating the face of the thus formed structure with a polycrystalline silicon layer; diffusing a first impurity into selected regions of the polycrystalline silicon layer; forming a silicon nitride mask on selected surface areas of the polycrystalline silicon layer for preventing subsequent oxidation of the regions under said areas; heating and oxidizing the region of the polycrystalline silicon layer other than that covered with the silicon nitride layer for diffusing the impurities into the silicon substrate from the polycrystalline silicon regions facing the substrate to form the functional regions and also diffusing said first impurity from the polycrystalline silicon region into the substrate through the SiO 2 layer for forming a shallowly diffused region having said impurity diffused thereinto to a depth less than the depth to which said substrate regions facing the polycrystalline silicon through said openings have had said impurity diffused thereinto; removing the silicon nitride layer; and providing conductors on the exposed silicon oxide.
Claim 2
Independent Claim
205 words
A method of making an MOS-type semiconductor device, comprising the steps of: forming a SiO 2 layer on a silicon substrate; selectively etching the SiO 2 layer to form openings which are located in correspondence to regions where functional regions are to be formed in the silicon substrate; coating the face of the thus formed structure with a polycrystalline silicon layer; diffusing a first impurity into selected regions of the polycrystalline silicon layer; forming a silicon nitride mask on selected surface areas of the polycrystalline silicon layer for preventing subsequent oxidation of the regions under said areas; heating and oxidizing the region of the polycrystalline silicon layer other than that covered with the silicon nitride layer for diffusing the impurities into the silicon substrate from the polycrystalline silicon regions facing the substrate to form the functional regions and also diffusing said first impurity from the polycrystalline silicon region into the substrate through the SiO 2 layer for forming a shallowly diffused region having said impurity diffused thereinto to a depth less than the depth to which said substrate regions facing the polycrystalline silicon through said openings have had said impurity diffused thereinto; removing the silicon nitride layer; and providing conductors on the exposed silicon oxide.
Claim 3
Dependent Claim
47 words
A method according to claim 1 further comprising diffusing a further impurity in a low concentration into a part of said polycrystalline layer into which said firstmentioned impurity has been diffused by said firstmentioned diffusing step and which has not been oxidized, to form a resistor region.
References Cited (Backward Citations)
US3942241A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-04-24 | 1981-10-24 | 1982-04-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-04-24 | 1985-10-24 | 1986-04-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-04-24 | 1989-10-24 | 1990-04-25 | $7700.00 | Window Closed / Lapsed |