Data display system designed as a microcontroller

Claim 2

A data display system comprising: (a) a programmable read-out memory (PROM) for storing a fixed microroutine for governing logic operation of the system; (b) first control means enabled by the PROM during an initial subroutine (status), for transferring a fixed number address into an address register; (c) a memory interface means for communicating with a main memory; (d) means connecting an address register output to the interface means for reading, from a main memory, the contents of the fixed number address, the contents being a character data starting address; (e) means connecting the output of the interface means to the first control means, for transferring the starting address and an incremented status, through the address register and a status counter, to an address control file means, for storing the starting address and the incremented status therein; (f) means for transferring the stored incremented status from the file means to a status register; (g) means connecting the status register to the PROM for the addressing thereof; (h) the first control means being responsive to the PROM for transferring therethrough, the stored starting address from the address control file to the address register; (i) second control means responsive to the PROM for transferring character data, from the starting address in the main memory, through the interface means, to display data store means, after the completion of transferral in (h); (j) means connecting the output of the data store means to character generating means for providing character data information, channel by channel, for a video display.

Claim 3

The subject matter set forth in claim 1 wherein the PROM is addressed by the status register, to actuate the first control means, for transferring a further fixed address into the address register during a separate status thereby causing writing from the interface means, into the control file means, the starting address of entry marker data; comparator means connected between the control file means and the address register when the starting address is stored as in (h), for comparing the starting addresses of the character data and the entry marker; and means connecting the comparator means output to the second control means for causing generation of an entry character instead of a data character, if a positive comparison results.

Claim 4

The subject matter set forth in claim 1 wherein the PROM is addressed by the status register to actuate the first control means to transfer a next fixed address into the address register during a separate status thereby causing writing from the interface means into the control file, the address of a mode character; the second control means responsive to the PROM for transferring a mode character from the mode character address in the main memory, through the interface means, to display data store means, after the mode character address is transferred from the control file to the address register.

Claim 5

The subject matter set forth in claim 3 and further wherein the PROM is addressed by the status register, to actuate the first control means, for transferring a further fixed address into the address register during a separate status thereby causing writing from the interface means, into the control file means, the starting address of entry marker data; comparator means connected between the control file means and the address register when the starting address is stored as in (h), for comparing the starting addresses of the character data and the entry marker; and means connecting the comparator means output to the second control means for causing generation of an entry marker character instead of a data character, if a positive comparison results.

Claim 6

A data display system capable of accommodating a plurality of video channels, the system comprising: (a) a programmable read-out memory (PROM) for storing a fixed microroutine for governing logic operation of the system; (b) first control means enabled by the PROM during an initial subroutine (status), for transferring fixed number addresses for respective channels, into an address register; (c) a memory interface means for communicating with a main memory; (d) means connecting an address register output to the interface means for reading from a main memory the contents of the respective fixed number addresses, for respective channels, the contents being the character data starting addresses of the respective channels; (e) means connecting the output of the interface means to the first control means for transferring the starting addresses of respective channels and incremented status conditions of respective channels through the address register and a status counter to an address control file means for storing the starting addresses and the incremented status conditions of the respective channels, therein; (f) means for sequentially transferring the stored incremented status of respective channels from the file means to a status register; (g) means connecting the status register to the PROM for the addressing thereof; (h) the first control means being responsive to the PROM for transferring therethrough, stored starting addresses of respective channels from the address control file means to the address register; (i) second control means responsive to the PROM for sequentially transferring character data, from the starting addresses of respective channels in the main memory, through the interface means, to display channel data store means, after the completion of transferral in (h); (j) means connecting the output of the data store means to character generating means for providing character data information channel by channel, for a video display.

Claim 7

A data display system capable of accommodating a plurality of video channels, the system comprising: (a) a programmable read-out memory (PROM) for storing a fixed microroutine for governing logic operation of the system; (b) first control means enabled by the PROM during an initial subroutine (status), for transferring fixed number addresses for respective channels, into an address register; (c) a memory interface means for communicating with a main memory; (d) means connecting an address register output to the interface means for reading from a main memory the contents of the respective fixed number addresses, for respective channels, the contents being the character data starting addresses of the respective channels; (e) means connecting the output of the interface means to the first control means for transferring the starting addresses of respective channels and incremented status conditions of respective channels through the address register and a status counter to an address control file means for storing the starting addresses and the incremented status conditions of the respective channels, therein; (f) means for sequentially transferring the stored incremented status of respective channels from the file means to a status register; (g) means connecting the status register to the PROM for the addressing thereof; (h) the first control means being responsive to the PROM for transferring therethrough, stored starting addresses of respective channels from the address control file means to the address register; (i) second control means responsive to the PROM for sequentially transferring character data, from the starting addresses of respective channels in the main memory, through the interface means, to display channel data store means, after the completion of transferral in (h); (j) means connecting the output of the data store means to character generating means for providing character data information channel by channel, for a video display.

Claim 8

The subject matter of claim 5 wherein the PROM is addressed by the status register to actuate the first control means to transfer further fixed addresses of respective channels into the address register during a separate status thereby causing writing from the interface means, into the control file means, the starting addresses of entry marker data for respective channels; comparator means connected between the control file means and the address register when the starting address of a respective channel is stored as in (h) for comparing the starting address of the character data and the entry marker of respective channels; and means connecting the comparator means output to the second control means for causing generation of an entry marker character instead of a data character, if a positive comparison results for a particular channel.

Claim 9

The subject matter set forth in claim 5 wherein the PROM is addressed by the status register to actuate the first control means to sequentially transfer next fixed addresses of respective channels into the address register during a separate status thereby causing writing from the interface means into the control file means, the addresses of mode characters of respective channels; the second control means responsive to the PROM for sequentially transferring mode characters from the mode character addresses in the main memory, through the interface means, after the mode character addresses are transferred from the control file to the address register.

Claim 10

The subject matter set forth in claim 7 and further wherein the PROM is addressed by the status register to actuate the first control means to transfer further fixed addresses of respective channels into the address register during a separate status thereby causing writing from the interface means, into the control file means, the starting addresses of entry marker data for respective channels; comparator means connected between the control file means and the address register when the starting address of a respective channel is stored as in (h) for comparing the starting address of the character data and the entry marker of respective channels; and means connecting the comparator means output to the second control means for causing generation of an entry marker character instead of a data character, if a positive comparison results for a particular channel.

Claim 11

The subject matter set forth in claim 5 together with counter means connected to an input of the control file means, and incremented when the means set forth in (e) has completed its operation, incrementing of the counter causing addressing of the control file means to respectively operate upon starting addresses of all channels before a second status is assumed.

Claim 12

The subject matter set forth in claim 6 together with counter means connected to an input of the control file means, and incremented when the means set forth in (e) has completed its operation, incrementing of the counter causing addressing of the control file means to respectively operate upon starting addresses of all channels before the individual status conditions.

Claim 15

The subject matter set forth in claim 11 together with means connected to the output of the data store means for generating a preselected character format signal therefrom.

Claim 16

The subject matter set forth in claim 12 together with means for converting the format signal into a video signal utilizable by a cathode ray tube for character display.

Claim 17

The subject matter set forth in claim 11 wherein the starting address in the control file means are respectively associated with a plurality of channels, the system further comprising: channel counter means enabled by the PROM for sequentially addressing the control file means for causing the starting addresses, of respective channels, to be transferred to the address register; whereby data is read from the main memory on a sequential channel-by-channel basis.

Claim 18

The subject matter set forth in claim 11 together with comparator means connected between outputs from the control file and the interface means for comparing the starting addresses of first and second types of data, a positive comparison causing the reading from the data store means, of the second type of data, in lieu of the first type.

Claim 19

The subject matter set forth in claim 12 together with comparator means connected between outputs from the control file and the interface means for comparing the starting addresses of character data and entry marker data, a positive comparison causing the reading from the data store means, of entry marker data, in lieu of character data, thus causing the generation of an entry marker character in lieu of a data character.

Claim 20

The subject matter set forth in claim 11 wherein the PROM increments the address register for reading out data from the main memory that is located in addresses subsequent to the starting address.

Claim 21

The subject matter set forth in claim 13 wherein the PROM increments the address register for reading out data from the main memory that is located in addresses subsequent to the starting address.