Interleaved synch and beginning of data indicators

Claim 2

A magnetic recorder for operating with a magnetic record member having a data record area preceded by a preamble area having synchronizing signals with interviewed beginning of record indicating signals; the improvement including in combination: means for initiating operation of the recorder for sensing said preamble signals; means in said recorder for detecting that a beginning of data indicator is being sensed; control means responsive to a plurality of said beginning of data indicators to indicate beginning of data in accordance therewith; beginning of data indicating recovery means responsive to said sensing means to indicate beginning of data when any one of said plurality of beginning of data indicators is reliably sensed; and said sensing means includes common pattern in all of said beginning of data indicators to signify that a beginning of data indicator is being sensed.

Claim 3

The apparatus set forth in claim 1 further including in combination: decoder means responsive to a plurality of said beginning of data indicators to indicate which beginning of data indicator is being sensed; and Bod control means responsive to said decoder means to indicate location within said preamble of a last sensed beginning of data indicator.

Claim 4

The apparatus set forth in claim 1 further including in combination: a plurality of decoding means in said decoder responsive to said common sensing means to detect a beginning of data indicator; and a plurality of beginning of data indicating latches supplying signals to said plurality of decoders for actuating same to indicate location of said beginning of data indicators in said preamble.

Claim 5

The apparatus set forth in claim 1 wherein said recovery circuit includes EXCLUSIVE OR means responsive to said beginning of data indicators for resetting same to indicate beginning of data whenever a beginning of data indicator is missed.

Claim 6

A recording circuit for magnetic recorder for recording preamble signals to precede a data record area, a set of recording circuits including means for generating a plurality of synchronizing signals and encoding means for encoding any one of a plurality of marker signals; including in combination: an interval counter for indicating signal position with any predetermined interval of signal cycles, said counter supplying a first signal for indicating a resynchronization position to said recording circuits for actuating same to record a resynchronization signal; secondary counter means responsive to signals from said interval counter for indicating one of a plurality of locations within said preamble as a interval number of said intervals; and encoding means responsive to said interval counter and to said secondary counter for actuating said recording signal circuits to record a plurality of marker signals in operative association with said resynchronization signal, all in accordance with the number of intervals counted by said interval counter.

Claim 7

A recording circuit for magnetic recorder for recording preamble signals to precede a data record area, a set of recording circuits including means for generating a plurality of synchronizing signals and encoding means for encoding any one of a plurality of marker signals; including in combination: an interval counter for indicating signal position with any predetermined interval of signal cycles, said counter supplying a first signal for indicating a resynchronization position to said recording circuits for actuating same to record a resynchronization signal; secondary counter means responsive to signals from said interval counter for indicating one of a plurality of locations within said preamble as a interval number of said intervals; and encoding means responsive to said interval counter and to said secondary counter for actuating said recording signal circuits to record a plurality of marker signals in operative association with said resynchronization signal, all in accordance with the number of intervals counted by said interval counter.

Claim 8

The apparatus set forth in claim 5 wherein said secondary counter actuates said encoder in a predetermined binary pattern for repetitively using marker signals for indicating precise locations preceding a data record area.

Claim 9

An electrical circuit for operating with a data signal encoder adapted to exchange signals with a record member, said electrical circuit adapted to actuate said recorder to exchange preamble signals with said record member, in combination: R means indicating a resynchronization signal, A means indicating an A marker signal, K means indicating signal counts exchanged between said recorder and said record member; circuit means responsive to said R means, A means, and K means to signify a plurality of beginning of data indicating locations; and signal transfer means in said recorder responsive to said circuit means to initiate a data signal exchange between said recorder and record member.

Claim 10

An electrical circuit for operating with a data signal encoder adapted to exchange signals with a record member, said electrical circuit adapted to actuate said recorder to exchange preamble signals with said record member, in combination: R means indicating a resynchronization signal, A means indicating an A marker signal, K means indicating signal counts exchanged between said recorder and said record member; circuit means responsive to said R means, A means, and K means to signify a plurality of beginning of data indicating locations; and signal transfer means in said recorder responsive to said circuit means to initiate a data signal exchange between said recorder and record member.

Claim 11

The electrical circuit set forth in claim 7 further including B means indicating a B marker signal; and said circuit means being further responsive to said B means to signify a plurality of beginning of data indicating locations.

Claim 12

The circuit set forth in claim 8 wherein said K means includes means responsive to said R means for presetting a count to a predetermined count and counting signals exchanged subsequent to said reference state; and said circuit means including decoder means responsive to said K means indicating a first count to signify said R means indicated signal, responsive to a second count to indicate an A means indicated signal, and to a third count to indicate a B means indicated signal, and further responsive to said third count, indicating location of said sensed signals within said preamble.