US4077014A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Automatic gain control circuit
Assignee: Olympus Corp
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Filing: 1976-10-12
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Granted: 1978-02-28
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Expires: 1996-10-12
Abstract
Abstract An automatic gain control circuit employs a field effect transistor having a pair of gate electrodes. Distortion factor is minimized by applying a rectified and smoothed output signal to the first gate electrode and applying an input signal to the second gate electrode either directly or through a resistor.
Inventors
- 👤 Ken Satoh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 11:14
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3005; H03G3/301; H03G3/3015
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
140 words
An automatic gain control circuit comprising a field effect transistor having source and drain electrodes and first and second gate electrodes; amplifier means having an output and an input, with the latter being coupled to one of said source and drain electrodes; a portion of the output from said amplifier means being coupled through polarized diode means to said first gate electrode, forming a feedback path for obtaining automatic gain control; an input terminal for receiving a signal to be amplified being coupled to the remaining one of said source and drain electrodes; means for coupling said input terminal to said second gate electrode to assist in maintaining a constant voltage between said second gate electrode and said input terminal in order to minimize distortion which might otherwise occur in the amplification of a signal applied to the input terminal.
Claim 2
Dependent Claim
140 words
An automatic gain control circuit comprising a field effect transistor having source and drain electrodes and first and second gate electrodes; amplifier means having an output and an input, with the latter being coupled to one of said source and drain electrodes; a portion of the output from said amplifier means being coupled through polarized diode means to said first gate electrode, forming a feedback path for obtaining automatic gain control; an input terminal for receiving a signal to be amplified being coupled to the remaining one of said source and drain electrodes; means for coupling said input terminal to said second gate electrode to assist in maintaining a constant voltage between said second gate electrode and said input terminal in order to minimize distortion which might otherwise occur in the amplification of a signal applied to the input terminal.
Claim 3
Dependent Claim
22 words
An automatic gain control circuit according to claim 1 in which the transistor is a metal-oxide-semiconductor field effect transistor of depletion type.
Claim 4
Dependent Claim
37 words
An automatic gain control circuit according to claim 1 in which input signals are applied to the second gate electrode through a resistor which constitutes said means for coupling said input terminal to said second gate electrode.
Claim 5
Dependent Claim
21 words
The automatic gain control circuit of claim 1, further comprising resistance and capacitance elements coupling said feedback path to ground reference.
Claim 6
Dependent Claim
42 words
The automatic gain control circuit of claim 1, wherein the semiconductor element in said feedback path is polarized to block positive going signals developed at the output of said amplifier from being applied to the gate electrode coupled to the feedback path.
Claim 7
Dependent Claim
28 words
The automatic gain control circuit of claim 1 in which said input is coupled to said source electrode and said input terminal is coupled to said drain electrode.
Claim 8
Dependent Claim
54 words
The automatic gain control circuit of claim 6 further comprising resistance and capacitance elements coupling said feedback path to ground reference; said semiconductor element in said feedback path being polarized to block positive going signals developed at the output of said amplifier from being applied to the gate electrode coupled to the feedback path.
Claim 9
Dependent Claim
37 words
An automatic gain control circuit according to claim 7 in which input signals are applied to the second gate electrode through a resistor which constitutes said means for coupling said input terminal to said second gate electrode.
Claim 10
Dependent Claim
22 words
An automatic gain control circuit according to claim 8 in which the transistor is a metal-oxide-semiconductor field effect transistor of depletion type.
References Cited (Backward Citations)
US3480873A
Cited
US3668542A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-02-27 | 1981-08-29 | 1982-02-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-02-27 | 1985-08-29 | 1986-02-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-02-27 | 1989-08-29 | 1990-02-28 | $7700.00 | Window Closed / Lapsed |