Transient generator

Claim 2

A transient generator comprising a series discharge circuit includng a discharge capacitor, a pair of output terminals, a resistor between said output terminals, and the anode and cathode of a silicon controlled rectifier; DC circuit means connected across said capacitor for charging said capacitor; circuit means for gating said silicon controlled rectifier for conduction; and means for interrupting said DC circuit means during discharge of said capacitor; said discharge circuit being characterized by a virtual absence of inductive impedance during discharge.

Claim 3

The combination as set forth in claim 1 wherein said discharge circuit includes additionally a low value inductor to delay the onset of capacitor discharge during turn-on of said silicon controlled rectifier which saturates substantially below capacitor discharge current flow.

Claim 4

A transient generator comprising a series discharge circuit including a discharge capacitor, output terminals, and the anode and cathode of a silicon controlled rectifier; a high voltage DC charging circuit connected across said capacitor and having a switching transistor therein, circuit means for determinng the production of a transient and having an output signal to initiate said transient, and coupler means responsive to said signal to make said transistor nonconductive and to trigger said silicon controlled rectifier for capacitor discharge through said discharge circuit upon the occurrence of said signal.

Claim 5

A transient generator comprising a series discharge circuit including a discharge capacitor, output terminals, and the anode and cathode of a silicon controlled rectifier; a high voltage DC charging circuit connected across said capacitor and having a switching transistor therein, circuit means for determinng the production of a transient and having an output signal to initiate said transient, and coupler means responsive to said signal to make said transistor nonconductive and to trigger said silicon controlled rectifier for capacitor discharge through said discharge circuit upon the occurrence of said signal.

Claim 6

The combination as set forth in claim 3 wherein said output signal is a strobe and said coupler means is optical.

Claim 7

The combination as set forth in claim 3 wherein said discharge and charging circuits are ground-isolated.

Claim 8

The combination as set forth in claim 4 wherein said discharge and charging circuits are ground-isolated.

Claim 9

The combination as set forth in claim 4 wherein said optical coupler means comprises a first optical coupler responsive to said strobe connected to make said transistor nonconductive during said strobe and a second optical coupler means connected to trigger said silicon controlled rectifier upon the initiation of said strobe.

Claim 10

The combination as set forth in claim 7 wherein said discharge and said charging circuits are ground-isolated.

Claim 11

The combination as set forth in claim 7 wherein said strobe has a predetermined duration and said second coupler means includes differentiating means to limit the duration of triggering of said silicon controlled rectifier to a shorter duration than said strobe.

Claim 12

The combination as set forth in claim 9 wherein said second coupler means includes second differentiating means to limit the duration of said first differentiating means.

Claim 13

In electrical apparatus, means for producing a signal at any one of a number of equally spaced phase angles in a cycle in reference to an input alternating current, which comprises means for converting said alternating current into a logic level change upon each crossing of the zero voltage axis, a comparator and a voltage controlled oscillator controlled by the output of said comparator defining a phase locked loop, circuit means for delivering the output of said converting means to the reference input terminal of said comparator, said oscillator having a multi pulse output per logic level cycle, pulse counting means for counting the output cycles of said oscillator, circuit means connected to said counting means to return a synchronizing pulse to the feedback input terminal of said comparator at the conclusion of a count to said number of phase angles to synchronize said synchronizing pulse with said logic level cycle and to reset said counting means, and means for deriving and producing a signal from said counting means at any predetermined count within said cycle.

Claim 14

In electrical apparatus, means for producing a signal at any one of a number of equally spaced phase angles in a cycle in reference to an input alternating current, which comprises means for converting said alternating current into a logic level change upon each crossing of the zero voltage axis, a comparator and a voltage controlled oscillator controlled by the output of said comparator defining a phase locked loop, circuit means for delivering the output of said converting means to the reference input terminal of said comparator, said oscillator having a multi pulse output per logic level cycle, pulse counting means for counting the output cycles of said oscillator, circuit means connected to said counting means to return a synchronizing pulse to the feedback input terminal of said comparator at the conclusion of a count to said number of phase angles to synchronize said synchronizing pulse with said logic level cycle and to reset said counting means, and means for deriving and producing a signal from said counting means at any predetermined count within said cycle.

Claim 15

The combination as set forth in claim 11 wherein the output of said voltage controlled oscillator and said signal counting means are pulses.

Claim 16

In electrical apparatus, means for producing a signal at any selected phase angle from 0° to a multiple of 360° in reference to an input alternating current which comprises means for converting said alternating current into a logic level change upon each crossing of the zero voltage axis, a comparator and a voltage controlled oscillator controlled by the output of said comparator defining a phase locked loop, circuit means for delivering the output of said converting means to the reference input terminal of said comparator, said oscillator having a multipulse output per logic level cycle, sufficient serially arranged decade counters to count to said multiple receiving the output pulses of said oscillator connected to deliver synchronizing pulses to the feedback input terminal of said comparator at 360 pulses and multiples thereof to synchronize said synchronizing pulses with said logic level cycle and to reset said counters, means for deriving and producing an output signal from said counters at any predetermined count up to said multiple, and gating means connected to receive said signal and to inhibit the application of said synchronizing pulses only to the counter resets until an output signal has been first produced.

Claim 17

In electrical apparatus, means for producing a signal at any selected phase angle from 0° to a multiple of 360° in reference to an input alternating current which comprises means for converting said alternating current into a logic level change upon each crossing of the zero voltage axis, a comparator and a voltage controlled oscillator controlled by the output of said comparator defining a phase locked loop, circuit means for delivering the output of said converting means to the reference input terminal of said comparator, said oscillator having a multipulse output per logic level cycle, sufficient serially arranged decade counters to count to said multiple receiving the output pulses of said oscillator connected to deliver synchronizing pulses to the feedback input terminal of said comparator at 360 pulses and multiples thereof to synchronize said synchronizing pulses with said logic level cycle and to reset said counters, means for deriving and producing an output signal from said counters at any predetermined count up to said multiple, and gating means connected to receive said signal and to inhibit the application of said synchronizing pulses only to the counter resets until an output signal has been first produced.

Claim 18

The combination as set forth in claim 13 wherein said phase angle output signal is from 0° to 720°, said serially arranged decade counters develop synchronizing pulses for the feedback terminal of said comparator at 360 and 720 pulse counts and to reset said counters, and said gating means is connected to receive said signal and to inhibit the application of the 360 count pulse to the counter resets when an output signal has not been first received.

Claim 19

A transient generator for producing a series of transients at any desired repetition rate within a range, comprising a series discharge circuit which includes a capacitor, a pair of output terminals, and the anode and cathode of a silicon controlled rectifier; DC circuit means for charging said capacitor, means for supplying triggering pulses to said silicon controlled rectifier at said rate, and means for interrupting said charging circuit during capacitor discharge and thereafter restoring said circuit, said pulse supplying means including a phase locked loop having a reference input terminal, a feedback input terminal, and a pulse output, a reference frequency source for supplying a reference frequency to the reference input terminal of said phase locked loop, pulse counting means connected to the output of said phase locked loop adjustable to any count within the range of said counting means, circuit means for delivering a synchronizing pulse from said counting means to the feedback input terminal of said phase locked loop and for resetting said counting means upon the arrival at said count, and circuit means connected to the output of said phase locked loop for delivering the pulses thereof to the gate of said silicon controlled rectifier.

Claim 20

A transient generator for producing a series of transients at any desired repetition rate within a range, comprising a series discharge circuit which includes a capacitor, a pair of output terminals, and the anode and cathode of a silicon controlled rectifier; DC circuit means for charging said capacitor, means for supplying triggering pulses to said silicon controlled rectifier at said rate, and means for interrupting said charging circuit during capacitor discharge and thereafter restoring said circuit, said pulse supplying means including a phase locked loop having a reference input terminal, a feedback input terminal, and a pulse output, a reference frequency source for supplying a reference frequency to the reference input terminal of said phase locked loop, pulse counting means connected to the output of said phase locked loop adjustable to any count within the range of said counting means, circuit means for delivering a synchronizing pulse from said counting means to the feedback input terminal of said phase locked loop and for resetting said counting means upon the arrival at said count, and circuit means connected to the output of said phase locked loop for delivering the pulses thereof to the gate of said silicon controlled rectifier.

Claim 21

The combination as set forth in claim 14 wherein said pulse delivering circuit includes a counter to divide the frequency of said signal by the digital value of said counter to shift the range of said repetition rate.

Claim 22

In electrical apparatus, means for optionally producing a signal at any one of a number of equally spaced phase angles in reference to an input reference frequency or producing said signal at any desired repetition rate within a range comprising a reference frequency source, a comparator having a reference input terminal connected to said reference frequency source and a feedback input terminal, a voltage controlled oscillator connected to be controlled by said comparator having an output terminal, pulse counting means connected to count the output pulses of said oscillator, said counting means including means adjustable to any count within the range of said counting means, circuit means including a first switch connecting said counting means and said feedback terminal to deliver a pulse to said terminal at the conclusion of a count to said number of phase angles to control said voltage controlled oscillator to synchronize said pulse with said reference frequency and to reset said counting means, circuit means connected between said adjustable means to obtain a pulse therefrom at an adjusted count and a signal output terminal, circuit means including a second switch connected between said voltage controlled oscillator output terminal and said signal output terminal, and circuit means including a third switch connected between said adjustable means and said feedback input terminal.

Claim 23

In electrical apparatus, means for optionally producing a signal at any one of a number of equally spaced phase angles in reference to an input reference frequency or producing said signal at any desired repetition rate within a range comprising a reference frequency source, a comparator having a reference input terminal connected to said reference frequency source and a feedback input terminal, a voltage controlled oscillator connected to be controlled by said comparator having an output terminal, pulse counting means connected to count the output pulses of said oscillator, said counting means including means adjustable to any count within the range of said counting means, circuit means including a first switch connecting said counting means and said feedback terminal to deliver a pulse to said terminal at the conclusion of a count to said number of phase angles to control said voltage controlled oscillator to synchronize said pulse with said reference frequency and to reset said counting means, circuit means connected between said adjustable means to obtain a pulse therefrom at an adjusted count and a signal output terminal, circuit means including a second switch connected between said voltage controlled oscillator output terminal and said signal output terminal, and circuit means including a third switch connected between said adjustable means and said feedback input terminal.

Claim 24

The combination as set forth in claim 17 wherein said reference frequency source comprises line alternating current.

Claim 25

The combination as set forth in claim 17 wherein said line alternating current is employed as the reference frequency source for said phase angle mode of operation and including additionally a second reference source for said repetition rate mode of operation, and circuitry including switch means for optionally connecting either of said reference frequency sources to said reference frequency input terminal of said comparator.