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US4070705A Expired / Lapsed US ⏱️ 0.0 years remaining

Simulation apparatus

Assignee: Raytheon Co
•
Filing: 1975-11-20
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Granted: 1978-01-24
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Expires: 1995-11-20
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Abstract

Abstract In building simulators for training purposes more and more of the simulation activities are being carried out by digital computers. One of the basic problems in checking out a large complex simulator system is the testing and evaluating -- and, where necessary, the correction -- of the computer programs in the simulation computer. As a design tool, this invention contemplates simulating that portion of the entire system which is not usually simulated and providing between the master simulation computer which is normally used in a simulator and the secondary computer which is used only in a system of this invention, an interface which permits the smooth functioning and intercommunications between the two.

Inventors

  • 👤 James Andre Lockwood
  • 👤 Francis Arthur Charrette

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 04:15
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/36; G06F11/3698; G06F11/22; G06F11/26; G06F11/261

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 657 words
A system for interconnecting an environmental computer and a simulation computer in a master-slave relation, in order to permit said environmental computer to check the simulation programs contained in said simulation computer permitting computer simulation of the operational equipment program contained in said environmental computer that comprises a portion of a training simulator, said system comprising: a simulation computer having a first memory for storing in the form of a computer program that portion of the system currently being simulated, a first central processing unit for exercising said computer program, and a first communications unit; an environmental computer having a second memory, a second central processing unit for exercising said computer program, and a second communications unit, said second communications unit being coupled to and in communication with said first communications unit; and said second communications unit also being coupled to said second central processing unit; said simulation computer being able to carry out a series of mathematical relationships to achieve specified continuous results requiring repeated updating of data; said second memory being divided into a plurality of separate addresses with each address being assigned to represent a specific item or condition of said system; said second central processing unit being coupled to said second memory and being able to read information into and out of said second memory; an interface connecting said first and second memories in mutual communication; a clock in said interface, which clock periodically generates an output pulse for the periodic updating of communications establishing the time for beginning communications between said simulation and environmental computers so that said simulation computer may update said environmental computer with data; means for applying said clock pulse to said first communications unit to interrupt the normal operation of said simulation computer; a bistable means in said interface connected to the output from said clock to be set by said clock pulse and used for storing the indication of said interrupt, means for connecting the set output of said bistable means to said first communications unit to signal to said simulation computer that the interruption of its normal operation was from said clock for the purpose of transferring information; a code generating means in said first communications unit responsive to and connected to said interrupt which is caused by said clock pulse and said set output being connected to said code generating means to generate a digital code representative of the type of communications to be established between said simulation and environmental computers and said interface; said interface further including a register coupled to said code generating means for storing said digital code generated by said code generating means; means for applying said code to the input of said register; a decoder in said second communications unit whose output is coupled to said environmental computer; means for connecting the output of said register to the input of said decoder so that said environmental computer reads the code decoded by said decoder and is able to communicate and receive information from said simulation computer via said first communications unit, permitting information to be transferred from said interface and said second communications unit so that said items or said conditions being stored in said second memory may be checked; means in said interface coupled to said first and second communications units and connected to and responsive to said code for resetting said bistable means; and said means being connected to and responsive to the generation of an end of cycle signal that is produced by said interrupt of said simulation computer so that said interface means will generate a signal for said environmental computer so that said environmental computer may be updated with data in order to simulate the instruments and indicators that comprise said operational equipment upon receipt of said data by said environmental computer, said environmental computer generating an end of cycle signal to said simulation computer to inform said simulation computer if additional data is available.
Claim 2
Independent Claim 657 words
A system for interconnecting an environmental computer and a simulation computer in a master-slave relation, in order to permit said environmental computer to check the simulation programs contained in said simulation computer permitting computer simulation of the operational equipment program contained in said environmental computer that comprises a portion of a training simulator, said system comprising: a simulation computer having a first memory for storing in the form of a computer program that portion of the system currently being simulated, a first central processing unit for exercising said computer program, and a first communications unit; an environmental computer having a second memory, a second central processing unit for exercising said computer program, and a second communications unit, said second communications unit being coupled to and in communication with said first communications unit; and said second communications unit also being coupled to said second central processing unit; said simulation computer being able to carry out a series of mathematical relationships to achieve specified continuous results requiring repeated updating of data; said second memory being divided into a plurality of separate addresses with each address being assigned to represent a specific item or condition of said system; said second central processing unit being coupled to said second memory and being able to read information into and out of said second memory; an interface connecting said first and second memories in mutual communication; a clock in said interface, which clock periodically generates an output pulse for the periodic updating of communications establishing the time for beginning communications between said simulation and environmental computers so that said simulation computer may update said environmental computer with data; means for applying said clock pulse to said first communications unit to interrupt the normal operation of said simulation computer; a bistable means in said interface connected to the output from said clock to be set by said clock pulse and used for storing the indication of said interrupt, means for connecting the set output of said bistable means to said first communications unit to signal to said simulation computer that the interruption of its normal operation was from said clock for the purpose of transferring information; a code generating means in said first communications unit responsive to and connected to said interrupt which is caused by said clock pulse and said set output being connected to said code generating means to generate a digital code representative of the type of communications to be established between said simulation and environmental computers and said interface; said interface further including a register coupled to said code generating means for storing said digital code generated by said code generating means; means for applying said code to the input of said register; a decoder in said second communications unit whose output is coupled to said environmental computer; means for connecting the output of said register to the input of said decoder so that said environmental computer reads the code decoded by said decoder and is able to communicate and receive information from said simulation computer via said first communications unit, permitting information to be transferred from said interface and said second communications unit so that said items or said conditions being stored in said second memory may be checked; means in said interface coupled to said first and second communications units and connected to and responsive to said code for resetting said bistable means; and said means being connected to and responsive to the generation of an end of cycle signal that is produced by said interrupt of said simulation computer so that said interface means will generate a signal for said environmental computer so that said environmental computer may be updated with data in order to simulate the instruments and indicators that comprise said operational equipment upon receipt of said data by said environmental computer, said environmental computer generating an end of cycle signal to said simulation computer to inform said simulation computer if additional data is available.
Claim 3
Dependent Claim 82 words
The system defined in claim 1 further including a second bistable device coupled to said second communications unit and said register for generating a first output signal which is coupled to said second communications unit alerting said environmental computer to the establishment of communications between said simulation and environmental computers, said second bistable means being responsive to the transfer of the code combination generated by said code generating means into said register to generate a second output signal to said simulation computer.
Claim 4
Independent Claim 258 words
A system for interconnecting two digital computers in a master-slave relation wherein a master computer containing a first communications unit that is able to perform a series of mathematical processes continuously to produce continually updated results and a slave computer containing a second communications unit and including an information memory comprising a plurality of separate addresses which are individually assigned to represent the status of a particular item or condition of an indicator or switch, each of said items or conditions being changed as said system operates, said system comprising: an interface connecting said first and second communications units in mutual communication with each other; said interface comprising a clock which generates an output interrupt signal for the periodic updating of communications; means for connecting said interrupt signal from said interface to said first communications unit; a first bistable device contained within said interface; means for connecting said interrupt signal to said first bistable device to set said first device, said first device being reset by said master computer; means for connecting the set output of said first bistable device to said first communications unit to indicate the purpose of said interrupt signal; said master computer in response to said set output and said interrupt signal generating a code combination indicative of the nature, direction and content of the communications to be established between said master and said slave computers, and means responsive to and connected to said code combination and coupled to said master computer and said slave computer for alerting said slave computer to the communication.
Claim 5
Independent Claim 258 words
A system for interconnecting two digital computers in a master-slave relation wherein a master computer containing a first communications unit that is able to perform a series of mathematical processes continuously to produce continually updated results and a slave computer containing a second communications unit and including an information memory comprising a plurality of separate addresses which are individually assigned to represent the status of a particular item or condition of an indicator or switch, each of said items or conditions being changed as said system operates, said system comprising: an interface connecting said first and second communications units in mutual communication with each other; said interface comprising a clock which generates an output interrupt signal for the periodic updating of communications; means for connecting said interrupt signal from said interface to said first communications unit; a first bistable device contained within said interface; means for connecting said interrupt signal to said first bistable device to set said first device, said first device being reset by said master computer; means for connecting the set output of said first bistable device to said first communications unit to indicate the purpose of said interrupt signal; said master computer in response to said set output and said interrupt signal generating a code combination indicative of the nature, direction and content of the communications to be established between said master and said slave computers, and means responsive to and connected to said code combination and coupled to said master computer and said slave computer for alerting said slave computer to the communication.
Claim 6
Dependent Claim 83 words
The system defined in claim 3 wherein said means responsive to the code combination includes at least a second bistable device; and means for applying to the set input of said second device a pulse generated by a portion of said code combination which was previously established by the software in said master computer, and means for connecting the set output of said second device to said slave computer to alert said slave computer to a forthcoming transfer of information between said computers.
Claim 7
Dependent Claim 76 words
The system defined in claim 4 wherein said means responsive to the code combination is coupled to said master computer and said slave computer and includes at least a register coupled to said code combination for receiving at its inputs said code combination, and means coupled to said register for applying the outputs of said register to said slave computer to indicate to the slave computer the type of communication being established by said master computer.
Claim 8
Dependent Claim 28 words
The system defined in claim 5 further including means responsive to at least a portion of said code combination for generating a signal resetting said first bistable device.

References Cited (Backward Citations)

US3287705A Cited
US3400372A Cited
US3585599A Cited
US3825901A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-01-23 1981-07-25 1982-01-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-01-23 1985-07-25 1986-01-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-01-23 1989-07-25 1990-01-24 $7700.00 Window Closed / Lapsed

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