Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
236 words
A method of economically addressing memory positions in a switch memory of a transit exchange for the transfer of synchronous data signals in incoming data channels received by incoming TDM-links to outgoing data channels transmitted on outgoing TDM-links which transfer data having several data rates that are multiples of a basic rate derived from the number of time slots in a TDM frame, the transit exchange including a switch memory for storage of incoming data signals in memory positions, each of which is assigned to one of the incoming data channels in the incoming TDM-links, and a buffer memory to which the data signals are transferred from said switch memory and stored in memory positions assigned to the time slots belonging to the respective outgoing data channels on the outgoing TDM-links before they are sent via these links, the writing as well as the reading occurring at a repetition rate determined by the data rate of the respective channels, said method comprising the steps of identifying the incoming TDM-link, deriving from the identification of the incoming TDM-link a data rate-type designation, the type designation being common to several links, deriving structure information in correspondence with said type designation, the structure information indicating the allocation of time slots to the various data channels of the respective link, and storing the incoming data signals in said memory positions of said switch memory in accordance with said structure information.
Claim 2
Independent Claim
236 words
A method of economically addressing memory positions in a switch memory of a transit exchange for the transfer of synchronous data signals in incoming data channels received by incoming TDM-links to outgoing data channels transmitted on outgoing TDM-links which transfer data having several data rates that are multiples of a basic rate derived from the number of time slots in a TDM frame, the transit exchange including a switch memory for storage of incoming data signals in memory positions, each of which is assigned to one of the incoming data channels in the incoming TDM-links, and a buffer memory to which the data signals are transferred from said switch memory and stored in memory positions assigned to the time slots belonging to the respective outgoing data channels on the outgoing TDM-links before they are sent via these links, the writing as well as the reading occurring at a repetition rate determined by the data rate of the respective channels, said method comprising the steps of identifying the incoming TDM-link, deriving from the identification of the incoming TDM-link a data rate-type designation, the type designation being common to several links, deriving structure information in correspondence with said type designation, the structure information indicating the allocation of time slots to the various data channels of the respective link, and storing the incoming data signals in said memory positions of said switch memory in accordance with said structure information.
Claim 3
Dependent Claim
249 words
In a transit exchange for the transfer of synchronous data signals received from incoming data channels on incoming TDM-links to outgoing data channels on outgoing TDM-links, the transit exchange including a switch memory with addressable memory positions for the storage of incoming data signals, each of which is assigned to one of the incoming data channels in the incoming TDM-links, and a buffer memory having memory positions to which the data signals are thereafter transferred from said switch and stored, the memory positions of the buffer memory being assigned to the time slots of the respective outgoing channels in the outgoing TDM-links, before they are sent via the outgoing TDM-links, the writing as well as the reading occurring at a repetition rate determined by the data rate of the respective channels, apparatus for addressing memory positions in the switch memory comprising: means for identifying an incoming TDM-link; means designating a link type based on data-rates of the link, the type designation being common to several links, said type designating means including a type memory arranged to supply a type designation in accordance with the designated link type; and means for generating structure information derived from the type designation, the structure information indicating the allocation of time slots to the various data channels of the respective link, said means including a structure memory having a memory area for each link type designation arranged to provide addresses of memory positions of the switch memory which are to receive the data signals.
Claim 4
Dependent Claim
249 words
In a transit exchange for the transfer of synchronous data signals received from incoming data channels on incoming TDM-links to outgoing data channels on outgoing TDM-links, the transit exchange including a switch memory with addressable memory positions for the storage of incoming data signals, each of which is assigned to one of the incoming data channels in the incoming TDM-links, and a buffer memory having memory positions to which the data signals are thereafter transferred from said switch and stored, the memory positions of the buffer memory being assigned to the time slots of the respective outgoing channels in the outgoing TDM-links, before they are sent via the outgoing TDM-links, the writing as well as the reading occurring at a repetition rate determined by the data rate of the respective channels, apparatus for addressing memory positions in the switch memory comprising: means for identifying an incoming TDM-link; means designating a link type based on data-rates of the link, the type designation being common to several links, said type designating means including a type memory arranged to supply a type designation in accordance with the designated link type; and means for generating structure information derived from the type designation, the structure information indicating the allocation of time slots to the various data channels of the respective link, said means including a structure memory having a memory area for each link type designation arranged to provide addresses of memory positions of the switch memory which are to receive the data signals.