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US4064407A Expired / Lapsed US ⏱️ 0.0 years remaining

Pulse voltage regulator

Assignee: United States Department of the Army
•
Filing: 1976-12-20
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Granted: 1977-12-20
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Expires: 1996-12-20
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Abstract

Abstract A pulse voltage regulator for maintaining constant output voltage pulses oss a burst of high voltage low ripple input pulses by removing exactly the same amount of ripple energy from a clamp capacitor during the interpulse period as was added to the capacitor during a pulse period.

Inventors

  • 👤 John J. Kelleher

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 16:19
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/08

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 87 words
A pulse voltage regulator comprising: a transformer having a primary winding disposed to receive pulses of high voltage energy and a secondary winding disposed for providing output load pulses in response to input pulses; in series, a diode and a capacitance coupled across said transformer secondary, the anode of said diode being coupled to one side of said transformer; a resistance network coupled across said capacitance; a zener diode and switching means coupled in series across said capacitance for selectively discharging said capacitance to a predetermined level.
Claim 2
Dependent Claim 87 words
A pulse voltage regulator comprising: a transformer having a primary winding disposed to receive pulses of high voltage energy and a secondary winding disposed for providing output load pulses in response to input pulses; in series, a diode and a capacitance coupled across said transformer secondary, the anode of said diode being coupled to one side of said transformer; a resistance network coupled across said capacitance; a zener diode and switching means coupled in series across said capacitance for selectively discharging said capacitance to a predetermined level.
Claim 3
Dependent Claim 108 words
A pulse voltage regulator as set forth in claim 1 wherein said switching means comprises a first transistor and a second transformer; the primary of said second transformer being disposed for coupling a constant potential therethrough to the collector of said transistor, and the secondary of said second transformer being coupled in series with said zener diode across said capacitance; the emitter of said transistor being coupled to the common side of said capacitance and the secondary of said second transformer, and the base of said transistor being coupled to said resistance network for receiving a variable voltage signal in response to voltage changes across said resistance network.
Claim 4
Dependent Claim 70 words
A pulse voltage regulator as set forth in claim 2 and further comprising an amplifier having first and second inputs and an output, the output of said amplifier being coupled to the base of said first transistor and the first input of said amplifier being coupled to said resistance network to provide said variable voltage signal, said second input of said amplifier being disposed to receive a reference input signal.
Claim 5
Dependent Claim 63 words
A pulse voltage regulator as set forth in claim 3 wherein said switching circuit further comprises a second transistor having the collector coupled to the base of said first transistor and the emitter coupled in parallel with the emitter of said first transistor, the base of said second transistor being disposed for receiving an input signal to inhibit operation of said first transistor.
Claim 6
Dependent Claim 47 words
A pulse voltage regulator as set forth in claim 4 and further comprising a regulated power supply and a second diode coupled in series across said capacitance, the cathode of said second diode being coupled to the cathode of said first diode in series with said capacitance.
Claim 7
Dependent Claim 31 words
A pulse voltage regulator as set forth in claim 5 wherein said regulated power supply has an input for receiving an inhibit signal for controlling the output voltage to said capacitance.

References Cited (Backward Citations)

US3196289A Cited
US3393368A Cited
US3675116A Cited
US3840774A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-12-19 1981-06-20 1981-12-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-12-19 1985-06-20 1985-12-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-12-19 1989-06-20 1989-12-20 $7700.00 Window Closed / Lapsed

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