Processor for increasing the run-length of digital signals

Abstract

Abstract A facsimile scene typically includes a plurality of lines, each line having a plurality of picture elements (pels). Often, pel signals are adaptable for run-length coding, a run being one or more successive pels having the same brightness level. To increase the length of a run and hence to permit more efficient use of a transmission link between transmitter and receiver, a processor arrangement is disclosed for permuting a measure of the pel signals responsive to a reference signal. The reference signal is a calibration signal. The measure is an error signal for indicating a difference between the current pel signal and a prediction thereof. In an illustrative bi-level facsimile system embodiment, if the calibration signal is a logic one, the error signal is loaded beginning at one end of a memory; if the calibration pel signal is a logic zero, the error signal is loaded beginning at the other end of the memory. The loaded permuted error signal having an increased run length is then sequentially read from one end of the memory for extension to a state of the art run-length coder.

Inventors

• 👤 Frank William Mounts
• 👤 Arun Narayan Netravali

Bibliographic Details