US4058717A
Expired / Lapsed
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Surface charge signal processing apparatus
Assignee: General Electric Co
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Filing: 1976-07-06
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Granted: 1977-11-15
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Expires: 1996-07-06
Abstract
Abstract A plurality of charge storage cells, each including first and second storage regions, are provided in a semiconductor substrate. Means are provided responsive to a scanning signal for introducing into each of the first charge storage regions a respective quantity of charge proportional to a respective sample of an analog signal. Means are provided responsive to the bits of one value of a digital reference word for maintaining storage of the analog samples in the first storage regions of the cells associated with such bits of one value. Means are provided responsive to bits of the other value of the digital reference word for transferring the analog samples to the second storage regions of the cells associated with such bits of the other value. The charges in all of the cells are transferred concurrently from one storage region to the other and the total net charge transferred to and from the first charge storage regions of all of the cells is sensed on a common conductor overlying all of the first charge storage regions of the cells.
Inventors
- 👤 William E. Engeler
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 04:33
CPC Classifications
H; H10; H10B; H10B12/00; G; G06; G06G; G06G7/00; G06G7/12; G06G7/19; G06G7/1907; G06J; G06J1/00
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
377 words
Signal correlator apparatus comprising a substrate of semiconductor material having a major surface, first means forming a first plurality of charge storage regions adjacent said major surface of said substrate, second means forming a second plurality of charge storage regions adjacent said major surface of said substrate, each separated from a respective charge storage region of said first plurality by a respective intermediate region and forming a respective charge storage cell therewith, said first means including a first plurality of electrodes, each electrode insulating overlying a respective charge storage region of said first plurality, said electrodes being interconnected, said second means including a second plurality of electrodes, each insulatingly overlying a respective charge storage region of said second plurality, means for introducing into each of successive ones of said first charge storage regions a respective one of successive quantities of charge, each quantity being proportional to a respective sample of a time varying analog signal, means for applying to each of said second storage electrodes a voltage waveform selected from a first voltage waveform and a second voltage waveform of the same periodicity in response to a respective one of a series of successive binary bits of a reference word, a. the bits of a first value in said series of bits forming a first group of bits and providing said first voltage waveform to the second electrodes associated with a first group of cells, said first voltage waveform causing charges to be transferred during a first interval of a period thereof from the first charge storage regions of said first group of cells to the second charge storage regions thereof, and causing said transferred charge to be returned during a second interval, b. the bits of a second value in said series of bits forming a second group of bits and providing said second voltage waveform to the second electrodes associated with a second group of cells, said second voltage waveform causing charge to be transferred from first charge storage regions of said second group of cells to the second charge storage regions thereof during said second interval, means connected in circuit with said first storage electrodes for sensing the total net charge transferred to and from said first charge storage regions during said second interval.
Claim 2
Dependent Claim
377 words
Signal correlator apparatus comprising a substrate of semiconductor material having a major surface, first means forming a first plurality of charge storage regions adjacent said major surface of said substrate, second means forming a second plurality of charge storage regions adjacent said major surface of said substrate, each separated from a respective charge storage region of said first plurality by a respective intermediate region and forming a respective charge storage cell therewith, said first means including a first plurality of electrodes, each electrode insulating overlying a respective charge storage region of said first plurality, said electrodes being interconnected, said second means including a second plurality of electrodes, each insulatingly overlying a respective charge storage region of said second plurality, means for introducing into each of successive ones of said first charge storage regions a respective one of successive quantities of charge, each quantity being proportional to a respective sample of a time varying analog signal, means for applying to each of said second storage electrodes a voltage waveform selected from a first voltage waveform and a second voltage waveform of the same periodicity in response to a respective one of a series of successive binary bits of a reference word, a. the bits of a first value in said series of bits forming a first group of bits and providing said first voltage waveform to the second electrodes associated with a first group of cells, said first voltage waveform causing charges to be transferred during a first interval of a period thereof from the first charge storage regions of said first group of cells to the second charge storage regions thereof, and causing said transferred charge to be returned during a second interval, b. the bits of a second value in said series of bits forming a second group of bits and providing said second voltage waveform to the second electrodes associated with a second group of cells, said second voltage waveform causing charge to be transferred from first charge storage regions of said second group of cells to the second charge storage regions thereof during said second interval, means connected in circuit with said first storage electrodes for sensing the total net charge transferred to and from said first charge storage regions during said second interval.
Claim 3
Dependent Claim
50 words
The apparatus of claim 1 in which said substrate of semiconductor material is of one conductivity type and said quantities of charge are in the form of minority carriers in said substrate and in which substantially all of the stored charge of a cell is transferred during said second interval.
Claim 4
Dependent Claim
99 words
The apparatus of claim 2 in which is provided a plurality of first gating electrodes, each insulatingly overlying a respective intermediate region, said gating electrodes being interconnected, means for applying a fixed first potential to said first gating electrodes to establish a depletion surface potential in each of said intermediate regions of a first value, means for applying during said first interval a second potential to said first storage electrodes to establish a depletion surface potential of a second value in each of said first storage regions, said second value being less in absolute magnitude than said first value.
Claim 5
Dependent Claim
45 words
The apparatus of claim 1 in which is provided means for periodically shifting each of the successive bits of said binary reference word one bit position with respect to the successive cells controlled thereby with the same periodicity as said first and second voltage waveforms.
Claim 6
Dependent Claim
50 words
The apparatus of claim 4 in which is provided a first shift register in which the successive bits of said reference word are stored therein, said successive bits being shifted serially in one direction one bit position at a time at the periodicity of said first and second voltage waveforms.
Claim 7
Dependent Claim
45 words
The apparatus of claim 1 in which said first and second voltage waveforms include a third interval during which charge is excluded from all of said second charge storage regions and during which charge is reestablished in selected cells in accordance with an analog signal.
Claim 8
Dependent Claim
86 words
The apparatus of claim 6 in which a scan shift register is provided and in which the selected cells consist of a single cell which is determined by the position of a scan bit in said scan shift register, and which also includes means for applying a scan bit to the input of said shift register, and means synchronized with said first and second voltage waveforms for shifting said scan bit, whereby said stored samples constitute a series of sequential samples of an analog input signal.
Claim 9
Dependent Claim
158 words
The apparatus of claim 3 in which said first voltage waveform establishes a first level of depletion surface potential in the second storage regions of said first group of cells during a first interval thereof and a second level of depletion surface potential during a succeeding second interval thereof, said first level of depletion surface potential being greater in absolute magnitude than said fixed first value of depletion surface potential and said second level of depletion surface potential being less in absolute magnitude than said fixed second value of depletion surface potential, and in which said second voltage waveform establishes said second level of depletion surface potential in said second storage region during said first interval and said first level of depletion surface potential during said second interval, said second level of depletion surface potential in said second storage regions providing blockage of charge therein and said first level of depletion surface potential providing storage of charge therein.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-11-14 | 1981-05-16 | 1981-11-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-11-14 | 1985-05-16 | 1985-11-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-11-14 | 1989-05-16 | 1989-11-15 | $7700.00 | Window Closed / Lapsed |