Electronic computer capable of searching a queue in response to a single instruction

Claim 1

An electronic digital computer capable of searching any of a plurality of queues in response to a single instruction specifying a base datum, a pointer datum, and an offset datum relating to a specific queue, each queue comprising predetermined ones of data, one data from a predetermined one of the data fields of each of predetermined ones of a plurality of list components, each list component having in addition to a plurality of data fields at least one pointer field having pointers, each particular pointer specifying, relative to said base datum, the particular pointer field of one of said predetermined list components that has one of said data next following in said specific queue, comprising: a memory for storing said plurality of list components; an instruction register for storing said single instruction, said single instruction being composed of an operation code specifying said specific queue to be searched and a condition of the search according to one of a plurality of conditions which may be preselected, a first operand code specifying reference values, and a second operand code specifying said base datum, said pointer datum and said off-set datum; a plurality of base registers connected to said instruction register, one of said base registers being preliminarily loaded with that portion of the second operand code specifying said base datum; a plurality of hardware registers connected to said instruction register, one of said hardware registers being preliminarily loaded with that portion of the second operand code specifying said pointer datum; a decoder connected to said instruction register and responsive to said operation code for producing a command signal; pointer reader means connected to said one base register, said one hardware register, and said memory and responsive to said command signal and the codes stored in said one base register and said one hardware register for successively reading said particular pointers out of said particular pointer fields stored in said memory; pointer loading means connected to said memory and to said one hardware register and responsive to said command signal and to the successively read-out pointers for loading, in place of the code specifying said pointer datum, said one hardware register with codes specifying successively read-out pointers, one at a time; data reader means connected to said instruction register, said one base register, said one hardware register and said memory and responsive to said command signal, that portion of said second operand code specifying said offset datum and the codes stored in said one base register and said one hardware register for sequentially reading said predetermined ones of data out of said data fields of each of said predetermined ones of a plurality of list components stored in said memory; a read register connected to said memory for temporarily storing a sequentially read-out data from said memory; a first comparator connected to said instruction register and said read register and responsive to said command signal, said first operand code and the sequentially read-out data temporarily stored in said read register for making a comparison according to one of said conditions.