Method of manufacturing a semiconductor integrated circuit device having a conductive plane and a diffused network of conductive tracks

Claim 1

A method of manufacturing a semiconductor device having a plurality of constituent components and a plurality of different possible metallisation patterns of conductors for interconnecting said components in a desired functional circuit arrangement, includes providing a semiconductor body with a substrate of one conductivity type forming a conductive plane in the device, and an epitaxial layer on the substrate of the same conductivity type, forming a plurality of diffused regions of opposite conductivity type in the epitaxial layer, a plurality of said diffused regions of opposite conductivity type and a plurality of unmodified regions of the epitaxial layer forming the constituent components of the device, simultaneously with forming said plurality of diffused regions of opposite conductivity type forming in the epitaxial layer a diffused network of conductive tracks of said opposite conductivity type remote from the conductive plane, forming at least one metallisation pattern of conductors of said plurality of different possible metallisation patterns of conductors on said epitaxial layer and connecting the conductive plane via at least one unmodified region of the epitaxial layer and to the components and the conductive tracks to form the desired functional circuit arrangement.

Claim 2

A method of manufacturing a semiconductor device having a plurality of constituent components and a plurality of different possible metallisation patterns of conductors for interconnecting said components in a desired functional circuit arrangement, includes providing a semiconductor body with a substrate of one conductivity type forming a conductive plane in the device, and an epitaxial layer on the substrate of the same conductivity type, forming a plurality of diffused regions of opposite conductivity type in the epitaxial layer, a plurality of said diffused regions of opposite conductivity type and a plurality of unmodified regions of the epitaxial layer forming the constituent components of the device, simultaneously with forming said plurality of diffused regions of opposite conductivity type forming in the epitaxial layer a diffused network of conductive tracks of said opposite conductivity type remote from the conductive plane, forming at least one metallisation pattern of conductors of said plurality of different possible metallisation patterns of conductors on said epitaxial layer and connecting the conductive plane via at least one unmodified region of the epitaxial layer and to the components and the conductive tracks to form the desired functional circuit arrangement.

Claim 6

A method of manufacturing a semiconductor device includes providing a semiconductor body with a substrate of one conductivity type forming a conductive plane and an epitaxial layer of the same conductivity type on said substrate, forming in said layer a first plurality of unmodified regions and a second plurality of unmodified regions of said one conductivity type extending through the epitaxial layer and being contiguous with the substrate, forming spaced heavily doped regions of opposite conductivity type at the interface between the substrate and the epitaxial layer, a plurality of diffused regions of opposing conductivity type within said semiconductor body and a diffused network of conductive tracks adjacent to the surface of the epitaxial layer remote from the conductive plane, said doped layers, said first plurality of unmodified regions and said plurality of diffused regions being formed so as to provide a plurality of isolated components and a metallisation pattern of conductors on said epitaxial layer connecting said components, conductive tracks and, via said second plurality of unmodified regions, the conductive plane in a functional circuit arrangement.

Claim 7

A method of manufacturing a semiconductor device includes providing a semiconductor body with a substrate of one conductivity type forming a conductive plane and an epitaxial layer of the same conductivity type on said substrate, forming in said layer a first plurality of unmodified regions and a second plurality of unmodified regions of said one conductivity type extending through the epitaxial layer and being contiguous with the substrate, forming spaced heavily doped regions of opposite conductivity type at the interface between the substrate and the epitaxial layer, a plurality of diffused regions of opposing conductivity type within said semiconductor body and a diffused network of conductive tracks adjacent to the surface of the epitaxial layer remote from the conductive plane, said doped layers, said first plurality of unmodified regions and said plurality of diffused regions being formed so as to provide a plurality of isolated components and a metallisation pattern of conductors on said epitaxial layer connecting said components, conductive tracks and, via said second plurality of unmodified regions, the conductive plane in a functional circuit arrangement.

Claim 8

A method of manufacturing a semiconductor device includes providing a semiconductor body with a substrate of one conductivity type forming a conductive plane and an epitaxial layer on said substrate of the same conductivity type forming a plurality of spaced heavily doped layers of opposite conductivity type at a portion of the interface between the substrate and the epitaxial layer, providing in said epitaxial layer a first plurality of unmodified regions of said one conductivity type contiguous with the conductive plane and extending through the epitaxial layer, at least one second unmodified region also of said one conductivity type and a plurality of diffused regions of said opposite conductivity type, forming adjacent to the surface of the epitaxial layer remote from the conductive plane a diffused network of conductive tracks of said opposite conductivity type, said plurality of heavily doped layers, said first plurality of unmodified regions and said plurality of diffused regions forming at least partially a plurality of components isolated from each other within the semiconductor body, and providing a metallisation pattern of conductors on said epitaxial layer connecting in a functional circuit arrangement said components, conductive tracks and, via said unmodified region, the conductive plane.

Claim 9

A method of manufacturing a semiconductor device includes providing a semiconductor body with a substrate of one conductivity type forming a conductive plane and an epitaxial layer on said substrate of the same conductivity type forming a plurality of spaced heavily doped layers of opposite conductivity type at a portion of the interface between the substrate and the epitaxial layer, providing in said epitaxial layer a first plurality of unmodified regions of said one conductivity type contiguous with the conductive plane and extending through the epitaxial layer, at least one second unmodified region also of said one conductivity type and a plurality of diffused regions of said opposite conductivity type, forming adjacent to the surface of the epitaxial layer remote from the conductive plane a diffused network of conductive tracks of said opposite conductivity type, said plurality of heavily doped layers, said first plurality of unmodified regions and said plurality of diffused regions forming at least partially a plurality of components isolated from each other within the semiconductor body, and providing a metallisation pattern of conductors on said epitaxial layer connecting in a functional circuit arrangement said components, conductive tracks and, via said unmodified region, the conductive plane.

Claim 13

A method of manufacturing a semiconductor device having a plurality of constituent components includes providing a semiconductor body with a substrate of one conductivity type forming a conductive plane in the device, and an epitaxial layer of the same conductivity type on the substrate, forming a plurality of diffused regions of opposite conductivity type in the epitaxial layer, a plurality of said diffused regions of opposite conductivity type and a plurality of unmodified regions of the epitaxial layer forming the constituent components of the device, simultaneously with forming said plurality of diffused regions of opposite conductivity type forming in the epitaxial layer a diffused network of conductive tracks of said opposite conductivity type, and forming one metallisation pattern of conductors of a plurality of different possible metallisation patterns of conductors, said provided metallisation pattern of conductors being disposed on said epitaxial layer and being connected to the conductive plane via at least one unmodified region of the epitaxial layer and to the components and the conductive tracks to form the desired functional circuit arrangement.

Claim 14

A method of manufacturing a semiconductor device having a plurality of constituent components includes providing a semiconductor body with a substrate of one conductivity type forming a conductive plane in the device, and an epitaxial layer of the same conductivity type on the substrate, forming a plurality of diffused regions of opposite conductivity type in the epitaxial layer, a plurality of said diffused regions of opposite conductivity type and a plurality of unmodified regions of the epitaxial layer forming the constituent components of the device, simultaneously with forming said plurality of diffused regions of opposite conductivity type forming in the epitaxial layer a diffused network of conductive tracks of said opposite conductivity type, and forming one metallisation pattern of conductors of a plurality of different possible metallisation patterns of conductors, said provided metallisation pattern of conductors being disposed on said epitaxial layer and being connected to the conductive plane via at least one unmodified region of the epitaxial layer and to the components and the conductive tracks to form the desired functional circuit arrangement.