Temperature monitoring of semiconductors

Claim 2

A circuit for monitoring the temperature of a junction of a semiconductor comprising: a. means for producing a signal having a value which is a function of the current conducted by the semiconductor; b. an electrical circuit analog of the thermal system of the semiconductor, said analog including electrical representations of the heat capacities of a total semiconductor structure including a heat sink and further including electrical representations of the thermal resistances from the junction to ambient; c. a current controller in circuit with said analog for controlling the current of said analog, said analog and said controller together comprising an analog-controller circuit; d. means for furnishing the current of said analog-controller circuit; e. means for applying said signal to said controller for controlling the conduction thereof whereby the control of said controller by said signal is such that the relation of signal value to the analog current magnitude approximates the power dissipation characteristic of the semiconductor junction; and, f. means connected to said analog for detecting a voltage thereof representative of junction temperature.

Claim 3

The invention in accordance with claim 1 wherein said electrical circuit analog comprises a resistance-capacitance network.

Claim 4

The invention in accordance with claim 1 wherein said means for producing a signal produces a voltage signal.

Claim 5

The invention in accordance with claim 1 wherein the last mentioned means comprises a voltage level detector responsive to the voltage of said analog to provide an output signal when the voltage of said analog exceeds a predetermined value.

Claim 6

A circuit for monitoring the temperature of a junction of a semiconductor device having a junction, a wafer, a body and a heat sink comprising: a. means for producing a signal having a value which is a function of the current conducted by the semiconductor device; b. an electrical resistance-capacitance analog of the thermal system of the semiconductor device including a first capacitance means representing the heat capacity of the junction of the semiconductive device, additional capacitance means representing the heat capacities of the wafer, body and heat sink and resistance means representing the thermal resistance from the junction to ambient; c. a current controller having a plurality of stages, each of said stages being responsive to said signal to control the magnitude of current conducted thereby, each of said stages being connected in parallel and having one side thereof connected to one side of said first capacitance means; d. a d.c. current supply having one pole connected to the other side of each of said stages and a second pole connected to the other side of said first capacitance means; e. means to apply said signal to each of the stages of said controller whereby the currents collectively conducted by said stages approximate a curve representing the power dissipation characteristics of the junction; and, f. means connected to said first capacitance means for measuring a voltage thereof representing the temperature of said junction.

Claim 7

A circuit for monitoring the temperature of a junction of a semiconductor device having a junction, a wafer, a body and a heat sink comprising: a. means for producing a signal having a value which is a function of the current conducted by the semiconductor device; b. an electrical resistance-capacitance analog of the thermal system of the semiconductor device including a first capacitance means representing the heat capacity of the junction of the semiconductive device, additional capacitance means representing the heat capacities of the wafer, body and heat sink and resistance means representing the thermal resistance from the junction to ambient; c. a current controller having a plurality of stages, each of said stages being responsive to said signal to control the magnitude of current conducted thereby, each of said stages being connected in parallel and having one side thereof connected to one side of said first capacitance means; d. a d.c. current supply having one pole connected to the other side of each of said stages and a second pole connected to the other side of said first capacitance means; e. means to apply said signal to each of the stages of said controller whereby the currents collectively conducted by said stages approximate a curve representing the power dissipation characteristics of the junction; and, f. means connected to said first capacitance means for measuring a voltage thereof representing the temperature of said junction.

Claim 8

The invention in accordance with claim 5 wherein said means for producing a signal produces a voltage signal.

Claim 9

The invention in accordance with claim 5 wherein the last mentioned means comprises a voltage level detector responsive to the voltage of the first capacitance means to provide an output signal when said voltage exceeds a predetermined value.

Claim 10

The invention in accordance with claim 6 wherein each of said stages includes: a. an operational amplifier to one input terminal of which is applied said voltage signal; b. a transistor having its base connected to an output of said amplifier and its collector-emitter in series circuit with resistance means between one side of said capacitance means and said one pole of said d.c. current supply; and, c. means to provide a feedback signal from the series circuit to a second input terminal of said operational amplifier.

Claim 11

The invention in accordance with claim 8 including means whereby the voltage signal is applied to the normal input terminal of the operational amplifier and the feedback signal is a positive voltage signal and is applied to the inverting input of the operational amplifier.

Claim 12

The invention in accordance with claim 8 wherein control means are selectively provided to control the value of the feedback signal.

Claim 13

The invention in accordance with claim 10 wherein said control means includes a voltage divider network.