US4045796A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Correlation system for pseudo-random noise signals
Assignee: Motorola Solutions Inc
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Filing: 1976-11-12
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Granted: 1977-08-30
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Expires: 1996-11-12
Abstract
Abstract An improved correlation system for coded signals wherein a signal is known in pattern but is unknown in timing and is bi-phase modulated on a suppressed carrier signal and correlation is accomplished with a time reference signal without the necessity for search and coherent recovery of the suppressed carrier signal.
Inventors
- 👤 Arthur Jonathan Kline, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 03:05
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/69; H04B1/707; G; G01; G01S; G01S13/00; G01S13/74; G01S13/82; H03; H03D; H03D1/00; H03D1/22; H03D1/24
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
159 words
A system for correlation of a first coded digital signal having a clock frequency with an identical coded digital signal of unknown time delay which is bi-phase modulated on a suppressed carrier signal, without recovery of the suppressed carrier signal, comprising: means for inverting alternate bits of the first coded digital signal for providing a PN* signal having a frequency component at one-half the clock frequency of the first coded signal; means for generating an estimated carrier signal; means for modulating said estimated carrier signal with said PN* signal; means for mixing said modulated signal with the identical coded signal of unknown time delay; means for squaring said mixed signal for providing a coded signal having a clock frequency equal to the clock frequency of the first coded signal; and means for controlling the phase of the first coded signal with said squared signal for correlating the first coded signal with the identical coded signal of unknown time delay.
Claim 2
Independent Claim
159 words
A system for correlation of a first coded digital signal having a clock frequency with an identical coded digital signal of unknown time delay which is bi-phase modulated on a suppressed carrier signal, without recovery of the suppressed carrier signal, comprising: means for inverting alternate bits of the first coded digital signal for providing a PN* signal having a frequency component at one-half the clock frequency of the first coded signal; means for generating an estimated carrier signal; means for modulating said estimated carrier signal with said PN* signal; means for mixing said modulated signal with the identical coded signal of unknown time delay; means for squaring said mixed signal for providing a coded signal having a clock frequency equal to the clock frequency of the first coded signal; and means for controlling the phase of the first coded signal with said squared signal for correlating the first coded signal with the identical coded signal of unknown time delay.
Claim 3
Dependent Claim
22 words
The system according to claim 1 comprising: means for deriving said unknown time delay; and means for displaying said derived time delay.
Claim 4
Dependent Claim
35 words
The system according to claim 1 comprising: means for deriving said unknown time delay; means for translating said time delay to a spatial distance form; and means for displaying said spatial distance form for readout.
Claim 5
Dependent Claim
22 words
The system according to claim 1 wherein said estimated carrier signal has an error component with respect to the suppressed carrier signal.
Claim 6
Dependent Claim
22 words
The system according to claim 4 wherein said means for squaring comprises: meand for filtering undesired frequency components of said mixed signal.
Claim 7
Independent Claim
150 words
A system for correlation of a first coded digital signal having a clock frequency with an identical coded digital signal of unknown time delay which is bi-phase modulated on a suppressed carrier signal, without recovery of the suppressed carrier signal, comprising: means for converting the first coded digital signal for providing a modified coded digital signal having a frequency component at one-half the clock frequency of the first coded digital signal; means for combining said modified coded digital signal with said coded digital signal of unknown time delay; means for squaring said combined modified coded digital signal and coded signal of unknown time delay for providing a combined signal having a frequency component at the clock frequency; and means for controlling the phase delay of the first coded digital signal with said squared signal for correlating the first coded digital signal with the coded digital signal of unknown time delay.
Claim 8
Independent Claim
150 words
A system for correlation of a first coded digital signal having a clock frequency with an identical coded digital signal of unknown time delay which is bi-phase modulated on a suppressed carrier signal, without recovery of the suppressed carrier signal, comprising: means for converting the first coded digital signal for providing a modified coded digital signal having a frequency component at one-half the clock frequency of the first coded digital signal; means for combining said modified coded digital signal with said coded digital signal of unknown time delay; means for squaring said combined modified coded digital signal and coded signal of unknown time delay for providing a combined signal having a frequency component at the clock frequency; and means for controlling the phase delay of the first coded digital signal with said squared signal for correlating the first coded digital signal with the coded digital signal of unknown time delay.
Claim 9
Dependent Claim
15 words
The system according to claim 6 wherein said means for squaring comprises a frequency doubler.
Claim 10
Dependent Claim
42 words
The system according to claim 6 wherein said means for squaring comprises: means for filtering said combined signal for eliminating undesired frequency components, said filtering means having an output signal; and means for frequency doubling said output signal of said filtering means.
Claim 11
Dependent Claim
26 words
The system according to claim 8 wherein said means for controlling comprises a phase locked loop for extracting a clock frequency signal from said squared signal.
Claim 12
Dependent Claim
38 words
The system according to claim 9, wherein said means for controlling comprises: phase sensitive circuit means for phase shifting said clock frequency signal to provide phase synchronization of said first coded digital signal and said bi-phase modulated signal.
Claim 13
Dependent Claim
62 words
The system according to claim 6 wherein said means for combining comprises: oscillating means for generating an estimated carrier signal, said estimated carrier signal having an error frequency; means for modulating said estimated carrier signal with said converted signal for producing a product signal thereof; and means for mixing said bi-phase modulated signal with said product signal for generating a combined signal.
Claim 14
Dependent Claim
33 words
The system according to claim 11 wherein said squaring means comprises: filtering means for rejecting undesired frequency components from said mixed signal; and means for frequency doubling the output of said filtering means.
Claim 15
Dependent Claim
78 words
The system according to claim 12, wherein said controlling means comprises: phase lock loop means for extracting a clock frequency signal from said mixed signal; means for digitally changing the clock signal frequency for controlling digital phase delay of the first coded digital signal; and means for phase shifting the first coded digital signal in response to a phase difference of less than one count between said clock frequency and said coded digital signal of unknown time delay.
Claim 16
Independent Claim
136 words
A method for correlating a first coded digital signal having a clock frequency with an identical coded digital signal of unknown time delay which is bi-phase modulated on a suppressed carrier signal, without the necessity for recovery of the suppressed carrier signal, comprising the steps of: converting the first coded digital signal to a modified coded digital signal haivng a frequency component at one-half the clock frequency of the first coded digital signal; combining said modified coded digital signal with the coded digital signal of unknown time delay; squaring said combined signal to provide a combined signal having a frequency component at the clock frequency; and controlling the phase delay of the first coded digital signal with said squared signal for correlating the first coded digital signal with the coded digital signal of unknown time delay.
Claim 17
Independent Claim
136 words
A method for correlating a first coded digital signal having a clock frequency with an identical coded digital signal of unknown time delay which is bi-phase modulated on a suppressed carrier signal, without the necessity for recovery of the suppressed carrier signal, comprising the steps of: converting the first coded digital signal to a modified coded digital signal haivng a frequency component at one-half the clock frequency of the first coded digital signal; combining said modified coded digital signal with the coded digital signal of unknown time delay; squaring said combined signal to provide a combined signal having a frequency component at the clock frequency; and controlling the phase delay of the first coded digital signal with said squared signal for correlating the first coded digital signal with the coded digital signal of unknown time delay.
Claim 18
Dependent Claim
16 words
The method according to claim 14 wherein said squaring step is accomplished with a frequency doubler.
Claim 19
Dependent Claim
37 words
The method according to claim 14 wherein said squaring step further comprises: filtering said combined signal to eliminate undesired frequency components; and doubling the frequency of said filtered signal to produce a signal at the clock frequency.
Claim 20
Dependent Claim
23 words
The method according to claim 16 wherein said controlling step further comprises: recovering the clock frequency by means of a phase locked loop.
Claim 21
Dependent Claim
49 words
The method according to claim 17 wherein said controlling step further comprises: shifting the phase of the first coded digital signal to correlate with the time delay of the digital signal of unknown time delay in response to a shift in the phase of said recovered clock frequency signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-08-29 | 1981-02-28 | 1981-08-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-08-29 | 1985-02-28 | 1985-08-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-08-29 | 1989-02-28 | 1989-08-30 | $7700.00 | Window Closed / Lapsed |