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US4040081A Expired / Lapsed US ⏱️ 0.0 years remaining

Alternating current control circuits

Assignee: Sony Corp
•
Filing: 1975-04-11
•
Granted: 1977-08-02
•
Expires: 1995-04-11
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Abstract

Abstract A novel circuit is provided for controlling an alternating current supplied to a load which includes a variable impedance element in the form of a low emitter concentration transistor which is bidirectional, and which has a high gain. The impedance of the variable impedance element to the flow of current therethrough is substantially the same in either direction of current flow.

Inventors

  • 👤 Takeshi Ninomiya
  • 👤 Masaaki Sakai
  • 👤 Kiyosuke Suzuki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 13:00
CPC Classifications
H; H03; H03G; H03G1/00; H03G1/0005; H03G1/0035; H03G1/0082; G; G05; G05F; G05F1/00; G05F1/10; G05F1/12; G05F1/40; G05F1/44; H03C; H03C1/00; H03C1/36; H10; H10D; H10D99/00

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 307 words
A control circuit for varying the impedance of the current supply line from an AC source to an AC load which includes a bidirectional continuously variable impedance semiconductor device connected in said current supply line, said semiconductor device comprising a first semiconductor region of one conductivity type, a second semiconductor region of the opposite conductivity type adjacent said first region with a first semiconductor junction therebetween, a third semiconductor region of the same type as said first region adjacent said second region with a second semiconductor junction therebetween, said first region having a first potential barrier formed therein having energy higher than that of the minority carriers injected from the second region to the first region at a position facing said first junction and spaced from the same by a distance smaller than the diffusion distance of the minority carriers, said third region having a second potential barrier formed therein and having an energy higher than minority carriers injected from the second region to the third region at a position facing said second junction and spaced from the same by a distance smaller than the diffusion distance of the minority carriers, said first and third regions of the semiconductor device each having a first portion with an impurity concentration of substantially the same order of magnitude respectively adjacent the first and second semiconductor junctions, first, second and third terminals coupled to said first, second and third regions, respectively, said first and third terminals connecting the semiconductor device in the supply line, means for causing a DC base current to flow through said second terminal of said semiconductor device, and means for selectively adjusting the magnitude of the DC base current to continuously vary the amplitude of the alternating current flowing through said semiconductor device whereby said alternating current has a substantially continuous waveform free of undesirable discontinuities.
Claim 2
Dependent Claim 307 words
A control circuit for varying the impedance of the current supply line from an AC source to an AC load which includes a bidirectional continuously variable impedance semiconductor device connected in said current supply line, said semiconductor device comprising a first semiconductor region of one conductivity type, a second semiconductor region of the opposite conductivity type adjacent said first region with a first semiconductor junction therebetween, a third semiconductor region of the same type as said first region adjacent said second region with a second semiconductor junction therebetween, said first region having a first potential barrier formed therein having energy higher than that of the minority carriers injected from the second region to the first region at a position facing said first junction and spaced from the same by a distance smaller than the diffusion distance of the minority carriers, said third region having a second potential barrier formed therein and having an energy higher than minority carriers injected from the second region to the third region at a position facing said second junction and spaced from the same by a distance smaller than the diffusion distance of the minority carriers, said first and third regions of the semiconductor device each having a first portion with an impurity concentration of substantially the same order of magnitude respectively adjacent the first and second semiconductor junctions, first, second and third terminals coupled to said first, second and third regions, respectively, said first and third terminals connecting the semiconductor device in the supply line, means for causing a DC base current to flow through said second terminal of said semiconductor device, and means for selectively adjusting the magnitude of the DC base current to continuously vary the amplitude of the alternating current flowing through said semiconductor device whereby said alternating current has a substantially continuous waveform free of undesirable discontinuities.
Claim 3
Dependent Claim 57 words
A control circuit according to claim 1, in which said first region has provided therein a second portion having an impurity concentration higher than said first portion of the first region at a position spaced from said first junction by a distance smaller than the diffusion distance of the minority carriers to establish said first potential barrier.
Claim 4
Dependent Claim 56 words
A control circuit according to claim 1, in which an additional semiconductor region of the same conductivity type as said second region is provided in contact with said first region at a position spaced from said first junction by a distance smaller than the diffusion distance of the minority carriers to establish said first potential barrier.
Claim 5
Dependent Claim 132 words
A control circuit according to claim 1, in which said adjustable DC current supplied to the second terminal of said semiconductor device is provided by a voltage biasing network comprising first and second transistors of the NPN and PNP type, respectively, the collector-emitter circuit of said NPN transistor being connected through a pair of serially connected resistors between a DC potential source and ground, the emitter-collector circuit of said PNP transistor being connected through a resistor between said DC potential source and said second terminal of said semiconductor device, said resistor being on the emitter side of said PNP transistor, an adjustable voltage biasing source connected between the base of said NPN transistor and ground, and the base of said PNP transistor being connected to the mid-point of said serially connected resistors.
Claim 6
Dependent Claim 52 words
A control circuit according to claim 1, in which a second bidirectional variable impedance semiconductor device similar to said first bidirectional device is connected in said current supply line and said means for causing a DC base current to flow also being connected to a second terminal of said second semiconductor device.
Claim 7
Dependent Claim 56 words
A control circuit according to claim 5, in which said means for selectively adjusting the magnitude of the DC base current includes a resistor connected between the second terminals of the first and second semiconductor devices, said resistor having a variable tap connected to said means for selectively adjusting the magnitude of the DC base current.

References Cited (Backward Citations)

GB906036A Cited
US3204160A Cited
US3289009A Cited
US3397326A Cited
US3748500A Cited
US3755793A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-08-01 1981-01-31 1981-08-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-08-01 1985-01-31 1985-08-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-08-01 1989-01-31 1989-08-02 $7700.00 Window Closed / Lapsed

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