Electronic timepiece battery potential detecting circuitry

Claim 2

In an electronic timepiece comprising oscillator means for producing a high frequency time standard signal, divider means for producing a low frequency timekeeping signal in response to said high frequency time standard signal, and display means for displaying time in response to the said timekeeping signal, the improvement comprising a DC power source for energizing said oscillator, divider and display means, said power source means being adapted to produce an effective potential for such energizing, and electronic switching means for detecting the effective potential produced by said power source means, said electronic switching means including first stage switching means and second stage switching means, said first stage switching means including a first control electrode coupled to said power source for detecting the effective potential thereof, said first stage means further including two further electrodes adapted to define a closed current circuit having one of a first positive and negative current temperature coefficient in response to said control electrode being referenced above a predetermined potential, said two further electrodes defining one of an increased and decreased impedance in response to said control electrode detecting a drop in the effective potential of said power source, and said second stage switching means having a control electrode coupled to one of said first stage means further electrodes for detecting the potential thereof when same defines a closed current path, said second stage further including two further electrodes defining a closed circuit having one of a positive and negative second temperature coefficient opposite to said first current temperature coefficient in response to said control electrode being referenced below said predetermined potential, said two further electrodes of said second stage means defining a circuit for compensating for changes in one of said increased and decreased impedance of said two further electrodes of said first stage means due to changes in temperature when said second stage switching means control electrode detects a change in the effective potential of said first stage switching means further electrodes.

Claim 3

An elelectronic timepiece as claimed in claim 1, wherein said first and second stage switching means include MOS field effect transistors having a gate electrode corresponding to said respective control electrodes and source and drain electrodes corresponding to said further electrodes, said drain electrodes having said first and second opposite temperature coefficients.

Claim 4

An electronic timepiece as claimed in claim 2, wherein said power source has a rated voltage, said first stage switching means being selected to have one of said first and second drain current temperature coefficients in a range of voltages between at least said predetermined potential and said rated voltage.

Claim 5

An electronic timepiece as claimed in claim 3, wherein said drain current electrode of said first stage switching means is referenced at a first indication potential in response to the range of voltages detected by said control electrode being between at least said predetermined potential and said rated voltage, said second stage switching means being selected to have said second drain current temperature coefficient opposite to said first stage transistor drain current temperature coefficient between at least said further predetermined potential and said first indication potential.

Claim 6

An electronic timepiece as claimed in claim 4, wherein the MOS transistor of said first stage switching means has a negative drain current temperature coefficient and the MOS transistor of said second stage switching means has a positive drain current temperature coefficient.

Claim 7

An electronic timepiece as claimed in claim 5, wherein said first stage switching means includes a P-MOS-FET transistor and an N-MOS-FET transistor and said second stage switching means includes the other of a P-MOS-FET transistor and an N-MOS-FET transistor.

Claim 8

An electronic timepiece as claimed in claim 6, and including a first load resistor connected intermediate said second stage MOS transistor source-drain path and said rated potential.

Claim 9

An electronic timepiece as claimed in claim 7, wherein said power source includes a first terminal referenced to said rated potential and a second terminal referenced to a reference potential, and including a second load resistor connected intermediate said first stage MOS transistor source-drain path and said reference potential.

Claim 10

An electronic timepiece as claimed in claim 8, wherein at least one of said load resistors is selected to adjust the gain of the associated stage so that the net temperature coefficient of said first and second stages is substantially zero in a range of voltages between about said rated voltage and about said predetermined voltage.

Claim 11

An electronic timepiece as claimed in claim 4, wherein said first and second stage switching means both include one of P-MOS-FET transistor and an N-MOS-FET transistor, said first stage MOS transistor having a positive current temperature coefficient.

Claim 12

An electronic timepiece as claimed in claim 9, and including a first load resistor connected intermediate said second stage MOS transistor and said reference potential.

Claim 13

An electronic timepiece as claimed in claim 11, wherein said power source includes a first terminal referenced at a rated voltage and a second terminal reference at a reference potential, and including a second load resistor connected intermediate said first stage MOS transistor and said rated potential.

Claim 14

An electronic timepiece as claimed in claim 12, wherein at least one of said load resistors is selected to adjust the gain of the associated stage so that the net temperature coefficient of said first and second stages is substantially zero in a range of voltages between about said rated voltage and about said predetermined voltage.

Claim 15

An electronic timepiece as claimed in claim 4, and including further detection circuit means coupled to said source-drain electrodes of the MOS transistor of the second stage switching means, said further detection circuit means producing a first voltage level in response to the open circuit condition of said second stage switching transistor source-drain electrodes, and producing a second voltage level in response to said second stage electrodes defining a closed current path.

Claim 16

An electronic timepiece as claimed in claim 14, wherein said further detection circuit means includes an inverter circuit having an input and output, the input of the inverter circuit being connected to one of said source-drain electrodes, the respective first and second voltage levels being produced at the output of said inverter circuit.

Claim 17

An electronic timepiece as claimed in claim 15, wherein said inverter circuit is formed of complementary coupled P-channel and N-channel MOS-FET transistors.

Claim 18

An electronic timepiece as claimed in claim 11, wherein said second stage switching means includes an inverter circuit formed from MOS transistors selected to have said second drain current temperature coefficient.

Claim 19

In an electronic timepiece comprising oscillator means for producing a high frequency time standard signal, divider means for producing a low frequency timekeeping signal in response to said high frequency time standard signal, and display means for displaying time in response to the said timekeeping signal, the improvement comprising a DC power source for energizing said oscillator, divider and display means, said power source means being adapted to produce an effective potential for such energizing, and electronic switching means for detecting the effective potential produced by said power source means, said electronic switching means including first stage switching means and second stage switching means, said first and second stage switching means both including an MOS transistor said first stage switching means MOS transistor including a gate electrode coupled to said power source for detecting the effective potential thereof and a source-drain path to define a closed current circuit having a selected first drain current temperature coefficient in response to said gate electrode being referenced to a potential that is one of a potential above a predetermined potential and a potential that is below a predetermined potential, said source-drain path of said first stage switching means defining one of an increased and decreased impedance in response to said gate electrode detecting a drop in the effective potential of said power source, and said MOS transistor of said second stage switching means having a gate electrode coupled to said first stage means source-drain path for detecting the potential thereof when same defines a closed current path, said MOS transistor of said second stage further including a source-drain path defining a closed circuit having a selected second drain current temperature coefficient opposite to said first drain current temperature coefficient in response to the gate electrode of said second stage MOS transistor being referenced to one of a potential that is above said predetermined potential in response to said first stage MOS transistor gate electrode being referenced below said predetermined potential and below said predetermined potential in response to said first stage MOS transistor gate electrode being referenced to a potential that is above said predetermined potential, said source-drain path of said second stage MOS transistor defining a circuit for compensating for a change in the positive and negative impedance of said first stage means source-drain path due to changes in temperature when said second stage switching means gate electrode detects a change in the effective potential of said first stage switching means source-drain path.

Claim 20

In an electronic timepiece comprising oscillator means for producing a high frequency time standard signal, divider means for producing a low frequency timekeeping signal in response to said high frequency time standard signal, and display means for displaying time in response to the said timekeeping signal, the improvement comprising a DC power source for energizing said oscillator, divider and display means, said power source means being adapted to produce an effective potential for such energizing, and electronic switching means for detecting the effective potential produced by said power source means, said electronic switching means including first stage switching means and second stage switching means, said first and second stage switching means both including an MOS transistor said first stage switching means MOS transistor including a gate electrode coupled to said power source for detecting the effective potential thereof and a source-drain path to define a closed current circuit having a selected first drain current temperature coefficient in response to said gate electrode being referenced to a potential that is one of a potential above a predetermined potential and a potential that is below a predetermined potential, said source-drain path of said first stage switching means defining one of an increased and decreased impedance in response to said gate electrode detecting a drop in the effective potential of said power source, and said MOS transistor of said second stage switching means having a gate electrode coupled to said first stage means source-drain path for detecting the potential thereof when same defines a closed current path, said MOS transistor of said second stage further including a source-drain path defining a closed circuit having a selected second drain current temperature coefficient opposite to said first drain current temperature coefficient in response to the gate electrode of said second stage MOS transistor being referenced to one of a potential that is above said predetermined potential in response to said first stage MOS transistor gate electrode being referenced below said predetermined potential and below said predetermined potential in response to said first stage MOS transistor gate electrode being referenced to a potential that is above said predetermined potential, said source-drain path of said second stage MOS transistor defining a circuit for compensating for a change in the positive and negative impedance of said first stage means source-drain path due to changes in temperature when said second stage switching means gate electrode detects a change in the effective potential of said first stage switching means source-drain path.

Claim 21

An electronic timepiece as claimed in claim 18, wherein said first and second stage switching means both include one of a P-MOS-FET transistor and an N-MOS-FET transistor, the drain current temperature coefficient of said first stage MOS transistor being positive.

Claim 22

An electronic timepiece as claimed in claim 18, wherein said first stage switching means includes one of a P-MOS-FET transistor and an N-MOS-FET transistor, said second stage switching means including the other of a P-MOS-FET transistor and an N-MOS-FET transistor, the drain current temperature coefficient of said first stage MOS transistor being negative.

Claim 23

In combination with a DC power source for producing an operable output voltage over an effective potential range, means for detecting the impending failure of said power source including electronic switching means for detecting effective potential produced by said power means, said electronic switching means including first stage switching means and second stage switching means, said first stage switching means including a first control electrode coupled to said power source for detecting the effective potential thereof, said first stage means further including two further electrodes adapted to define a closed current circuit having one of a positive and negative current temperature coefficient in response to said control electrode being referenced above a predetermined potential, said two further electrodes defining one of an increased and decreased impedance in response to said control electrode detecting a drop in the effective potential of said power source, and said second stage switching means having a control electrode coupled to one of said first stage means further electrodes for detecting the potential thereof when same defines a closed current path, said second stage further including two further electrodes defining a closed circuit having one of a positive and negative second temperature coefficient opposite to said first current temperature coefficient in response to said second stage control electrode being referenced below said predetermined potential, said two further electrodes defining a circuit for compensating for one of an increase and decrease in the impedance of said first stage further electrodes due to changes in temperature when said second stage switching means control electrode detects a change in the effective potential of said first stage switching means further electrodes.

Claim 24

In combination with a DC power source for producing an operable output voltage over an effective potential range, means for detecting the impending failure of said power source including electronic switching means for detecting effective potential produced by said power means, said electronic switching means including first stage switching means and second stage switching means, said first stage switching means including a first control electrode coupled to said power source for detecting the effective potential thereof, said first stage means further including two further electrodes adapted to define a closed current circuit having one of a positive and negative current temperature coefficient in response to said control electrode being referenced above a predetermined potential, said two further electrodes defining one of an increased and decreased impedance in response to said control electrode detecting a drop in the effective potential of said power source, and said second stage switching means having a control electrode coupled to one of said first stage means further electrodes for detecting the potential thereof when same defines a closed current path, said second stage further including two further electrodes defining a closed circuit having one of a positive and negative second temperature coefficient opposite to said first current temperature coefficient in response to said second stage control electrode being referenced below said predetermined potential, said two further electrodes defining a circuit for compensating for one of an increase and decrease in the impedance of said first stage further electrodes due to changes in temperature when said second stage switching means control electrode detects a change in the effective potential of said first stage switching means further electrodes.

Claim 25

Power source failure detecting means as claimed in claim 21, wherein said first and second stage switching means include MOS field effect transistors having a gate electrode corresponding to said respective control electrodes and source and drain electrodes corresponding to said further electrodes, said drain electrodes having said first and second opposite temperature coefficients.

Claim 26

Power source failure detecting means as claimed in claim 22, wherein said power source has a rated voltage, said first stage switching means being selected to have one of said first and second drain current temperature coefficients in a range of voltages between at least said predetermined potential and said rated voltage.

Claim 27

Power source failure detecting means as claimed in claim 23, wherein said drain current electrode of said first stage switching means is referenced at a first indication potential in response to the range of voltages detected by said control electrode being between at least said predetermined potential and said rated voltage, said second stage switching means being selected to have said second drain current temperature coefficient opposite to said first stage transistor drain current temperature coefficient between at least said further predetermined potential and said first indication potential.

Claim 28

Power source failure detecting means as claimed in claim 24, wherein the MOS transistor of said first stage switching means has a negative drain current temperature coefficient and the MOS transistor of said second stage switching means has a positive drain current temperature coefficient.

Claim 29

Power source failure detecting means as claimed in claim 25, wherein said first stage switching means includes a P-MOS-FET transistor and an N-MOS-FET transistor and said second stage switching means includes the other of a P-MOS-FET transistor and an N-MOS-FET transistor.

Claim 30

Power source failure detecting means as claimed in claim 26, and including a first load resistor connected intermediate said second MOS transistor source-drain path and said rated potential.

Claim 31

Power source failure detecting means as claimed in claim 27, wherein said power source includes a first terminal referenced to said rated potential and a second terminal referenced to a reference potential, and including a second load resistor connected intermediate said first stage MOS transistor source-drain path and said reference potential.

Claim 32

Power source failure detecting means as claimed in claim 28, wherein at least one of said load resistors is selected to adjust the gain of the associated stage so that the net temperature coefficient of said first and second stages is substantially zero in a range of voltages between about said rated voltage and about said predetermined voltage.

Claim 33

Power source failure detecting means as claimed in claim 24, wherein said first and second stage switching means both include one of P-MOS-FET transistor and an N-MOS-FET transistor, said first stage MOS transistor having a positive current temperature coefficient.

Claim 34

Power source failure detecting means as claimed in claim 29, and including a first load resistor connected intermediate said second stage MOS transistor and said reference potential.

Claim 35

Power source failure detecting means as claimed in claim 31, wherein said power source includes a first terminal referenced at a rated voltage and a second terminal reference at a reference potential, and including a second load resistor connected intermediate said first stage MOS transistor and said rated potential.

Claim 36

Power source failure detecting means as claimed in claim 32, wherein at least one of said load resistors is selected to adjust the gain of the associated stage so that the net temperature coefficient of said first and second stages is substantially zero in a range of voltages between about said rated voltage and about said predetermined voltage.

Claim 37

Power source failure detecting means as claimed in claim 24, and including further detection circuit means coupled to said source-drain electrodes of the MOS transistor of the second stage switching means, said further detection circuit means producing a first voltage level in response to the open circuit condition of said second stage switching transistor source-drain electrodes, and producing a second voltage level in response to said second stage electrodes defining a closed current path.

Claim 38

Power source failure detecting means as claimed in claim 34, wherein said further detection circuit means includes an inverter circuit having an input and output, the input of the inverter circuit being connected to one of said source-drain electrodes, the respective first and second voltage levels being produced at the output of said inverter circuit.

Claim 39

Power source failure detecting means as claimed in claim 35, wherein said inverter circuit is formed of complementary coupled P-channel and N-channel MOS-FET transistors.

Claim 40

Power source failure detecting means as claimed in claim 31, wherein said second stage switching means includes an inverter circuit formed from MOS transistors selected to have said second drain current temperature coefficient.

Claim 41

Power source failure detecting means as claimed in combination with a D.C. power source for producing an operable output voltage over an effective potential comprising means for detecting the impending failure to said power source including electronic switching means for detecting the effective potential produced by said power source means, said electronic switching means including first stage switching means and second stage switching means, said first and second stage switching means each including an MOS transistor, said first stage switching means MOS transistor including a gate electrode coupled to said power source for detecting the effective potential thereof and a source-drain path to define a closed current circuit having a selected first drain current temperature coefficient in response to said gate electrode being referenced to one of a potential that is above a predetermined potential and a potential that is below a predetermined potential, said source-drain path of said first stage switching means defining one of an increased and decreased impedance in response to said gate electrode detecting a drop in the effective potential of said power source, and said MOS transistor of said second stage switching means having a gate electrode coupled to said first stage means source-drain path for detecting the potential thereof when same defines a closed current path, said MOS transistor of said second stage further including a source-drain path defining a closed circuit having a selected second drain current temperature coefficient opposite to said first drain current temperature characteristic in response to the gate electrode of said second stage MOS transistor being referenced to one of a potential that is above said predetermined potential in response to said first stage MOS transistor gate electrode being referenced to a potential that is below said predetermined potential and below said predetermined potential in response to said first stage MOS transistor gate electrode being referenced to a potential that is above said predetermined potential, said source-drain path of said second stage MOS transistor defining a circuit for compensating for one of said increased and decreased impedance of first stage switching means source-drain path caused by changes in temperature when said second stage switching means gate electrode detects a change in the effective potential of said first stage switching means source-drain path.

Claim 42

Power source failure detecting means as claimed in claim 38, wherein said first and second stage switching means both include one of a P-MOS-FET transistor and an N-MOS-FET transistor, the drain current temperature coefficient of said first stage MOS transistor being positive.

Claim 43

Power source failure detecting means as claimed in claim 38, wherein said first stage switching means includes one of a P-MOS-FET transistor and an N-MOS-FET transistor, said second stage switching means including the other of a P-MOS-FET transistor and an N-MOS-FET transistor, the drain current temperature coefficient of said first stage MOS transistor being negative.