Arrays for infrared image detection

Claim 2

A monolithic infrared detector array comprising: a block of monocrystalline semiconductor material taken from the group consisting of silicon and germanium, said block of semiconductor material being doped with an infrared-sensitive conductivity-determining impurity and having first and a second pluralities of parallel slots respectively formed in the opposite major surfaces thereof, said first plurality of parallel slots formed in one major surface of said semiconductor block being orthogonally related to said second plurality of parallel slots formed in the other major surface of said semiconductor block, a third plurality of parallel slots formed in said other major surface of said semiconductor block, said third plurality of parallel slots being parallel to said first plurality of parallel slots formed in said one major surface of said semiconductor block and being orthogonally related to and intersecting with said second plurality of parallel slots formed in said other major surface thereof, said third plurality of parallel slots defining respective holes extending into the semiconductor material of said semiconductor block from said other major surface thereof toward said one major surface thereof, a patterned metal layer opaque to infrared radiation overlying said one major surface of said semiconductor block and including a plurality of interrupted metal strips extending over the semiconductor material of said semiconductor block between successive slots formed therein; a plurality of semiconductor regions of said one major surface of said semiconductor block including exposed areas arranged in a plurality of linear rows across said plurality of metal strips and forming the interruptions therein, the exposed areas of said plurality of semiconductor regions communicating with respective portions of said semiconductor block disposed therebeneath and defining active infrared detector areas, said active infrared detector areas respectively including said holes as defined by said third plurality of parallel slots formed in said other major surface of said semiconductor block, said plurality of semiconductor regions respectively including portions thereof contacting the metal strip segments on opposite sides of the exposed areas of said plurality of semiconductor regions, insulation means interposed between the remaining portions of said patterned metal layer and said one major surface of said semiconductor block, and means associated with said holes providing electrically conductive areas in communication with said active infrared detector areas and said other major surface of said semiconductor block.

Claim 3

A monolithic infrared detector array as set forth in claim 1, wherein said electrically conductive area-providing means comprises spaced pairs of hole-defining opposed conductive surface regions of semiconductor material having a relatively high concentration of a dopant impurity diffused therein.

Claim 4

A monolithic infrared detector array as set forth in claim 2, wherein the opposed pairs of conductive surface regions of semiconductor material having a relatively high concentration of a dopant impurity diffused therein respectively extend onto the other major surface of said semiconductor block to define conductive margins around respective holes.

Claim 5

A monolithic infrared detector array as set forth in claim 2, further including a patterned second metal layer on the other major surface of said semiconductor block including a plurality of metal strips extending over the semiconductor material of the other major surface of said semiconductor block and forming a common electrical contact with each of said pairs of opposed conductive surface regions of semiconductor material corresponsing to a respective linear row of exposed areas of said plurality of semiconductor regions of said one major surface of said semiconductor block.

Claim 6

A monolithic infrared detector array as set forth in claim 2, wherein said third plurality of parallel slots are relatively narrow in width as compared to said first and second pluralities of parallel slots respectively formed in said one major surface and said other major surface of said semiconductor block.

Claim 7

A monolithic infrared detector array as set forth in claim 1, wherein said electrically conductive area -providing means associated with said holes comprises respective electrically conductive fillings in each of said holes.

Claim 8

A monolithic infrared detector array comprising: a block of monocrystalline semiconductor material taken from the group consisting of silicon and germanium, said block of semiconductor material being doped with an infrared-sensitive conductivity-determing impurity and having a plurality of parallel slots formed in at least one major surface thereof, a patterned first metal layer opaque to infrared radiation overlying said one major surface of said semiconductor block and including a plurality of interrupted metal strips extending over the semiconductor material of said semiconductor block between successive slots formed therein, a plurality of semiconductor regions of said one major surface of said semiconductor block including exposed areas arranged in at least one linear row across said plurality of metal strips and forming the interruptions therein, the exposed areas of said plurality of semiconductor regions communicating with respective portions of said semiconductor block disposed therebeneath and defining active infrared detector areas, said plurality of semiconductor regions respectively including portions thereof contacting the metal strip segments on opposite sides of the exposed areas of said plurality of semiconductor regions, insulation means interposed between the remaining portions of said patterned first metal layer and said one major surface of said semiconductor block, the other major surface of said semiconductor block being provided with a plurality of holes extending at least substantially through the thickness of said semiconductor block toward respective exposed areas of said plurality of semiconductor regions and in registration therewith, means defining electrically conductive areas within each of said plurality of holes, a patterned second metal layer on the other major surface of said semiconductor block including a plurality of metal strips extending over the semiconductor material of the other major surface of said semiconductor block in respective alignment with said plurality of interrupted metal strips included in said patterned first metal layer disposed on said one major surface of said semiconductor block, insulation means interposed between the plurality of metal strips included in said patterned second metal layer and said other major surface of said semiconductor block, said insulation means being patterned to define respective boundaries extending about semiconductor material of said other major surface of said semiconductor block which defines a margin around each respective hole, and said plurality of metal strips included in said patterned second metal layer respectively contacting the marginal portions of semiconductor material included in said other major surface of said semiconductor block bounding each of said holes and also contacting said electrically conductive areas within each of said holes.

Claim 9

A monolithic infrared detector array comprising: a block of monocrystalline semiconductor material taken from the group consisting of silicon and germanium, said block of semiconductor material being doped with an infrared-sensitive conductivity-determing impurity and having a plurality of parallel slots formed in at least one major surface thereof, a patterned first metal layer opaque to infrared radiation overlying said one major surface of said semiconductor block and including a plurality of interrupted metal strips extending over the semiconductor material of said semiconductor block between successive slots formed therein, a plurality of semiconductor regions of said one major surface of said semiconductor block including exposed areas arranged in at least one linear row across said plurality of metal strips and forming the interruptions therein, the exposed areas of said plurality of semiconductor regions communicating with respective portions of said semiconductor block disposed therebeneath and defining active infrared detector areas, said plurality of semiconductor regions respectively including portions thereof contacting the metal strip segments on opposite sides of the exposed areas of said plurality of semiconductor regions, insulation means interposed between the remaining portions of said patterned first metal layer and said one major surface of said semiconductor block, the other major surface of said semiconductor block being provided with a plurality of holes extending at least substantially through the thickness of said semiconductor block toward respective exposed areas of said plurality of semiconductor regions and in registration therewith, means defining electrically conductive areas within each of said plurality of holes, a patterned second metal layer on the other major surface of said semiconductor block including a plurality of metal strips extending over the semiconductor material of the other major surface of said semiconductor block in respective alignment with said plurality of interrupted metal strips included in said patterned first metal layer disposed on said one major surface of said semiconductor block, insulation means interposed between the plurality of metal strips included in said patterned second metal layer and said other major surface of said semiconductor block, said insulation means being patterned to define respective boundaries extending about semiconductor material of said other major surface of said semiconductor block which defines a margin around each respective hole, and said plurality of metal strips included in said patterned second metal layer respectively contacting the marginal portions of semiconductor material included in said other major surface of said semiconductor block bounding each of said holes and also contacting said electrically conductive areas within each of said holes.

Claim 10

A monolithic infrared detector array as set forth in claim 7, wherein said electrically conductive area-defining means within each of said plurality of holes comprises hole-defining conductive surface regions of semiconductor material having a relatively high concentration of a dopant impurity diffused therein.

Claim 11

A monolithic infrared detector array as set forth in claim 8, wherein the conductive surface regions of semiconductor material having a relatively high concentration of a dopant impurity diffused therein included in said hole-defining conductive surface regions extend onto the other major surface of said semiconductor block and define the margins around respective holes.

Claim 12

A monolithic infrared detector array as set forth in claim 7, wherein said electrically conductive area-defining means within each of said plurality of holes comprises respective electrically conductive fillings.

Claim 13

A monolithic infrared detector array as set forth in claim 7, wherein said plurality of parallel slots and said plurality of holes extend completely through the thickness of said semiconductor block.

Claim 14

A monolithic infrared detector array as set forth in claim 11, wherein said electrically conductive area-defining means within each of said plurality of holes comprises hole-defining conductive surface regions of semiconductor material having a relatively high concentration of a dopant impurity diffused therein.

Claim 15

A monolithic infrared detector array as set forth in claim 11, wherein said electrically conductive area-defining means within each of said plurality of holes comprises respective electrically conductive fillings.

Claim 16

An array of image detectors in a single semiconductor wafer defined by slots forming parallel rows on each side of the semiconductor wafer, which slots are used to bias the detectors, and another isolating slot in the wafer which extends through one of the biasing slots.

Claim 17

An array of image detectors in a single semiconductor wafer defined by slots forming parallel rows on each side of the semiconductor wafer, which slots are used to bias the detectors, and another isolating slot in the wafer which extends through one of the biasing slots.

Claim 18

An array of image detectors in a single semiconductor wafer defined by a plurality of parallel rows in said semiconductor wafer, each row having a hole therein extending through the semiconductor wafer, the walls of each hole being conductive and forming one contact to a detector, the other contact to a detector comprises a layer conducting material on the surface of the semiconductor wafer.

Claim 19

An array of image detectors in a single semiconductor wafer defined by a plurality of parallel rows in said semiconductor wafer, each row having a hole therein extending through the semiconductor wafer, the walls of each hole being conductive and forming one contact to a detector, the other contact to a detector comprises a layer conducting material on the surface of the semiconductor wafer.

Claim 20

The array according to claim 15 wherein the walls of the holes are made conductive by an impurity diffusion.

Claim 21

The array according to claim 16 wherein the parallel rows in the semiconductor wafer are defined by slots formed in one surface of the semiconductor wafer, and that impurity diffusions on one surface of the semiconductor wafer are each connected with one impurity diffusion in the walls of a hole in each detector.

Claim 22

The array according to claim 15 wherein one of the contacts to each detector is a PN junction.

Claim 23

The array according to claim 15 wherein one of the contacts to each detector is a rectifying contact.

Claim 24

A process for forming an array of image detectors comprising the steps of etching slots in one face of a semiconductor wafer to form a parallel row of ridges, each ridge containing a detector, etching a hole which extends through the ridges, and diffusing an impurity into the hole and ridges to form contact regions to the detectors.

Claim 25

A process for forming an array of image detectors comprising the steps of etching slots in one face of a semiconductor wafer to form a parallel row of ridges, each ridge containing a detector, etching a hole which extends through the ridges, and diffusing an impurity into the hole and ridges to form contact regions to the detectors.

Claim 26

An array of infrared detectors extending between two major faces of a semiconductor wafer comprising one or more rows of detectors formed in the semiconductor wafer, each row separated from adjacent wafer material and each other by slots in at least one major face of the semiconductor wafer, one contact to each detector is an ohmic contact and the other contact is a rectifying contact, all of the rectifying contacts being similarly located on the semiconductor wafer.

Claim 27

An array of infrared detectors extending between two major faces of a semiconductor wafer comprising one or more rows of detectors formed in the semiconductor wafer, each row separated from adjacent wafer material and each other by slots in at least one major face of the semiconductor wafer, one contact to each detector is an ohmic contact and the other contact is a rectifying contact, all of the rectifying contacts being similarly located on the semiconductor wafer.