← Back to Patent Explorer
US4028634A Expired / Lapsed US ⏱️ 0.0 years remaining

Feed-forward amplifier with simple resistive coupling

Assignee: AT&T Inc
•
Filing: 1976-02-11
•
Granted: 1977-06-07
•
Expires: 1996-02-11
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Feedback amplifiers having zero or infinite input and output impedances are used as the main amplifier and error amplifier elements of a feed-forward amplifier system. This allows the required impedance matching with simple resistive coupling networks rather than the complicated couplers heretofore required. The use of both series and shunt feedback provides convenient coupling points for the proper phase relationship between combining signals, and the unidirectional conductivity of the amplifier transistors supplies the directionality usually required of the couplers.

Inventors

  • 👤 Kenneth Donald Tentarelli

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 22:27
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/68; H03F1/00; H03F1/32; H03F1/3223; H03F1/3229; H03F3/20; H03F3/21; H03F3/211

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 252 words
A feed-forward amplifier for amplifying electromagnetic wave signals comprising: signal splitting means for dividing an input signal into first and second portions and applying said portions to first and second paths, respectively, said first path including a main amplifier for producing an amplified replica of said input signal, said amplified replica inherently including error components introduced by said main amplifier, signal tapping means connected to said main amplifier for tapping off a portion of said amplified replica and applying it to a third path, first signal combining means connected to said second and third paths for effecting subtraction of said second input signal portion from said amplified replica portion to produce an error signal substantially proportional to said error components, and for preventing feedback from said third path to said second path, error amplifying means connected to said first signal combining means for amplifying said error signal, and second signal combining means connected to said first path and said error amplifying means for effecting subtraction of said error components from said amplified replica to produce a substantially distortion-free output signal, Characterized in that said main amplifier has an output port with substantially zero output impedance, said signal tapping means comprises a resistive splitting junction formed at said output port, said error amplifying means has an input port with substantially zero input impedance, and said first signal combining means comprises a resistive summing junction formed at said input port, said third path introducing substantially zero phase shift between said output and input ports.
Claim 2
Dependent Claim 252 words
A feed-forward amplifier for amplifying electromagnetic wave signals comprising: signal splitting means for dividing an input signal into first and second portions and applying said portions to first and second paths, respectively, said first path including a main amplifier for producing an amplified replica of said input signal, said amplified replica inherently including error components introduced by said main amplifier, signal tapping means connected to said main amplifier for tapping off a portion of said amplified replica and applying it to a third path, first signal combining means connected to said second and third paths for effecting subtraction of said second input signal portion from said amplified replica portion to produce an error signal substantially proportional to said error components, and for preventing feedback from said third path to said second path, error amplifying means connected to said first signal combining means for amplifying said error signal, and second signal combining means connected to said first path and said error amplifying means for effecting subtraction of said error components from said amplified replica to produce a substantially distortion-free output signal, Characterized in that said main amplifier has an output port with substantially zero output impedance, said signal tapping means comprises a resistive splitting junction formed at said output port, said error amplifying means has an input port with substantially zero input impedance, and said first signal combining means comprises a resistive summing junction formed at said input port, said third path introducing substantially zero phase shift between said output and input ports.
Claim 3
Dependent Claim 37 words
A feed-forward amplifier as in claim 1 wherein said main amplifier has a second output port of opposite phase from said first mentioned output port, said second signal combining means being connected to said second output port.
Claim 4
Dependent Claim 40 words
A feed-forward amplifier as in claim 2 wherein said main amplifier comprises a current feedback pair having an output transistor, said summing junction being formed at the emitter and said second output port comprising the collector of said output transistor.
Claim 5
Dependent Claim 18 words
A feed-forward amplifier as in claim 3 wherein said error amplifying means comprises a second current feedback pair.
Claim 6
Dependent Claim 29 words
A feed-forward amplifier as in claim 1 wherein said second path includes a second input port of said error amplifier of opposite phase from said first mentioned input port.
Claim 7
Dependent Claim 41 words
A feed-forward amplifier as in claim 5 wherein said error amplifying means comprises a voltage feedback pair having an input transistor, said summing junction being formed at the emitter and said second input port comprising the base of said input transistor.
Claim 8
Dependent Claim 17 words
A feed-forward amplifier as in claim 6 wherein said main amplifier comprises a second voltage feedback pair.

References Cited (Backward Citations)

US2662126A Cited
US3202928A Cited
US3471798A Cited
US3541467A Cited
US3667065A Cited
US3725806A Cited
US3815040A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-06-06 1980-12-06 1981-06-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-06-06 1984-12-06 1985-06-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-06-06 1988-12-06 1989-06-07 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag