US4028562A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Negative impedance transistor device
Assignee: McDonnell Douglas Corp
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Filing: 1975-06-16
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Granted: 1977-06-07
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Expires: 1995-06-16
Abstract
Abstract Transistor device exhibiting negative resistance characteristics includes an enhancement mode insulated gate field effect transistor interacting with an integral bipolar transistor. The transistor device has a bulk region separated from a shallow substrate region by a pn-junction located in proximity to source and drain regions of the field effect transistor. The source region also serves as the emitter, the substrate region serves as the base, and the bulk region serves as the collector of the integral bipolar transistor wherein the substrate base is left floating. Normally, the collector of the bipolar transistor is connected to the gate of the field effect transistor, and a resistor of finite value is included in the gate circuit. Oscillator, astable multivibrator, gated oscillator, gated astable multivibrator, and bistable multivibrator circuits are illustratively constructed with the transistor device.
Inventors
- 👤 Rainer Zuleeg
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 01:04
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/354; G; G01; G01R; G01R31/00; G01R31/26; G01R31/2607; G01R31/2621; H03B; H03B7/00; H03B7/02; H03B7/06; H03K3/021; H03K3/36; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10D84/406
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
187 words
A transistor device providing high gain performance and exhibiting negative impedance characteristics, said transistor device comprising: an enhancement mode insulated gate field effect transistor including a substrate region, a dielectric gate positioned over said substrate region, a source region, and a drain region which is spaced from said source region; a bipolar transistor structurally integral with said field effect transistor and including a base, an emitter, and a collector; a bulk region serving as said collector, said substrate region serving also as said base, and said source region serving also as said emitter; a pn-junction located in proximity to said source and drain regions, said substrate region being separated by said pn-junction from said bulk region and left floating as said base of said bipolar transistor, and said substrate region common to said field effect and bipolar transistors causing interaction therebetween to provide said high gain performance and generate said negative impedance characteristics; and a source and emitter contact to said source region, a drain contact to said drain region, and a collector contact to said bulk region, said collector contact being normally connected to said gate.
Claim 2
Dependent Claim
187 words
A transistor device providing high gain performance and exhibiting negative impedance characteristics, said transistor device comprising: an enhancement mode insulated gate field effect transistor including a substrate region, a dielectric gate positioned over said substrate region, a source region, and a drain region which is spaced from said source region; a bipolar transistor structurally integral with said field effect transistor and including a base, an emitter, and a collector; a bulk region serving as said collector, said substrate region serving also as said base, and said source region serving also as said emitter; a pn-junction located in proximity to said source and drain regions, said substrate region being separated by said pn-junction from said bulk region and left floating as said base of said bipolar transistor, and said substrate region common to said field effect and bipolar transistors causing interaction therebetween to provide said high gain performance and generate said negative impedance characteristics; and a source and emitter contact to said source region, a drain contact to said drain region, and a collector contact to said bulk region, said collector contact being normally connected to said gate.
Claim 3
Dependent Claim
35 words
The invention as defined in claim 1 wherein said substrate region is a shallow region of predetermined thickness, and further comprising a resistance of finite predetermined value provided in a circuit including said gate therein.
Claim 4
Dependent Claim
48 words
The invention as defined in claim 1 wherein said field effect transistor is an n-channel enhancement mode insulated gate field effect transistor in which said substrate region comprises p-type material and said source and drain regions comprise n.sup. + -type material, and said bulk region comprises n-type material.
Claim 5
Dependent Claim
73 words
The invention as defined in claim 2 further comprising a first supply voltage, a second supply voltage, and an inductive element connecting said drain contact to one polarity side of said first supply voltage, said finite resistance connecting one polarity side of said second supply voltage to said gate, and said source contact being connected to the other polarity sides of said first and second supply voltages whereby an oscillator circuit is obtained.
Claim 6
Dependent Claim
70 words
The invention as defined in claim 2 wherein said finite resistance includes a resistance potentiometer having an adjustable tab, and further comprising a supply voltage, and an inductive element connecting said drain contact to one polarity side of said supply voltage, said adjustable tab being connected to said gate, and said source contact being connected to the other polarity side of said supply voltage whereby an oscillator circuit is obtained.
Claim 7
Dependent Claim
33 words
The invention as defined in claim 5 wherein said supply voltage and said inductive element are selected with predetermined values to provide a load line condition whereby an astable multivibrator circuit is obtained.
Claim 8
Dependent Claim
41 words
The invention as defined in claim 5 further comprising a resistor connecting said source contact to said other polarity side of said supply voltage, and means for applying a gating signal across said resistor whereby a gated oscillator circuit is obtained.
Claim 9
Dependent Claim
42 words
The invention as defined in claim 6 further comprising a resistor connecting said source contact to said other polarity side of said supply voltage, and means for applying a gating signal across said resistor whereby a gated astable multivibrator circuit is obtained.
Claim 10
Dependent Claim
92 words
The invention as defined in claim 2 wherein said finite resistance includes a resistance potentiometer having an adjustable tab, and further comprising a supply voltage, a load resistor connecting said drain contact to one polarity side of said supply voltage, means for applying a reset signal to said drain contact, and means for applying a set signal to said drain contact, said adjustable tab being connected to said gate, and said source contact being connected to the other polarity side of said supply voltage whereby a reset-set bistable multivibrator circuit is obtained.
Claim 11
Dependent Claim
73 words
The invention as defined in claim 9 wherein said reset signal is of one polarity and said set signal is of another polarity, and said reset signal applying means includes unidirectional conducting means for applying said reset signal to said drain contact to reset said bistable multivibrator circuit and said set signal applying means includes unidirectional conducting means for applying said set signal to said drain contact to set said bistable multivibrator circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-06-06 | 1980-12-06 | 1981-06-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-06-06 | 1984-12-06 | 1985-06-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-06-06 | 1988-12-06 | 1989-06-07 | $7700.00 | Window Closed / Lapsed |