US4028140A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device manufacture
Assignee: US Philips Corp
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Filing: 1975-10-22
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Granted: 1977-06-07
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Expires: 1995-10-22
Abstract
Abstract A method of directly etching an inverted-mesa semiconductor structure, wherein the mesa is first formed by shallow etching from the epitaxial layer surface and then undercut by preferentially etching the substrate more rapidly than the epitaxial layer.
Inventors
- 👤 John Gilbert Summers
- 👤 Maurice Pierrepont
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 19:39
CPC Classifications
H; H10; H10P; H10P95/00; H10D; H10D99/00; H10P50/00; H10P50/60; H10P50/61; H10P50/613; Y; Y10; Y10S; Y10S438/00; Y10S438/978
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
201 words
A method of manufacturing a semiconductor device comprising the steps of a. providing a semiconductor layer of one conductivity type on a semiconductor body portion of the same conductivity type but higher conductivity, b. forming an etch-masking layer on part of the semiconductor layer surface, c. subjecting the semiconductor layer surface to an etching treatment which etches through the semiconductor layer where exposed around said etch-masking layer to leave a mesa portion of the semiconductor layer under said etch-masking layer and to expose the part of said semiconductor body portion around said mesa portion, and d. while using the etch-masking layer to mask the top of said mesa-portion, subjecting the exposed parts of said semiconductor body portion and said mesa portion to further etching which includes removing the material of said semiconductor body portion faster than that of said semiconductor layer to etch under said mesa portion of the semiconductor layer and cause the whole upper edge of said mesa portion to overhang the adjacent etched surface, the side of said mesa portion being bevelled by the further etching so that the area of the resulting mesa portion of the semiconductor layer increases from its interface with said semiconductor body portion.
Claim 2
Independent Claim
201 words
A method of manufacturing a semiconductor device comprising the steps of a. providing a semiconductor layer of one conductivity type on a semiconductor body portion of the same conductivity type but higher conductivity, b. forming an etch-masking layer on part of the semiconductor layer surface, c. subjecting the semiconductor layer surface to an etching treatment which etches through the semiconductor layer where exposed around said etch-masking layer to leave a mesa portion of the semiconductor layer under said etch-masking layer and to expose the part of said semiconductor body portion around said mesa portion, and d. while using the etch-masking layer to mask the top of said mesa-portion, subjecting the exposed parts of said semiconductor body portion and said mesa portion to further etching which includes removing the material of said semiconductor body portion faster than that of said semiconductor layer to etch under said mesa portion of the semiconductor layer and cause the whole upper edge of said mesa portion to overhang the adjacent etched surface, the side of said mesa portion being bevelled by the further etching so that the area of the resulting mesa portion of the semiconductor layer increases from its interface with said semiconductor body portion.
Claim 3
Dependent Claim
37 words
A method as claimed in claim 1, which said further etching comprises a single etching treatment which also etches the exposed side and bottom edge of said mesa portion sufficiently to provide the bevel of said side.
Claim 4
Dependent Claim
66 words
A method as claimed in claim 1, in which said further etching comprises a first etching treatment to etch under said mesa portion and a second etching treatment which removes the material of the semiconductor layer at least as fast as that of said semiconductor body portion to etch the exposed side and bottom edge of said mesa portion to provide the bevel on said side.
Claim 5
Dependent Claim
33 words
A method as claimed in claim 1, in which the etching which bevels the side of said mesa portion is terminated before said bevel extends to the upper edge of said mesa portion.
Claim 6
Dependent Claim
63 words
A method as claimed in claim 1, in which after bevelling the side of said mesa portion dopant characteristic to the opposite conductivity type is introduced into the top of said mesa portion to form with the mesa portion of the semiconductor layer of said one conductivity type a p-n junction which terminates at the bevel in the side of said mesa portion.
Claim 7
Dependent Claim
48 words
A method as claimed in claim 5, in which said dopant is introduced by directing dopant ions at said semiconductor layer surface which dopant ions are implanted in the top of the mesa portion while the overhanging edge of said mesa portion masks underlying semiconductor portions against implantation.
Claim 8
Dependent Claim
91 words
A method as claimed in claim 5, in which the semiconductor layer and body part are of silicon and the etch-masking layer comprises a material masking against oxidation, and after bevelling the side of said mesa portion and while using the etch-masking layer to mask the top of said mesa portion the exposed silicon is subjected to an oxidation treatment to grow an insulating and passivating layer of silicon oxide on the bevelled side of said mesa portion and on the surface of said semiconductor body portion around said mesa portion.
Claim 9
Dependent Claim
43 words
A method as claimed in claim 7, in which said dopant of the opposite conductivity type is introduced into the top of said mesa portion by impurity diffusion after removing said etch-masking layer and while using said silicon oxide layer as diffusion mask.
Claim 10
Dependent Claim
50 words
A method as claimed in claim 5, in which after forming said p-n junction, metal is evaporated to provide a metallic contact on the exposed top of said mesa portion, the side of said mesa portion being masked against the metal by the overhanging upper edge of said mesa portion.
References Cited (Backward Citations)
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Cited
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Cited
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Cited
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Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-06-06 | 1980-12-06 | 1981-06-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-06-06 | 1984-12-06 | 1985-06-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-06-06 | 1988-12-06 | 1989-06-07 | $7700.00 | Window Closed / Lapsed |