Phase synchronizing circuit

Claim 1

A circuit which synchronizes a motor at the receiving end of a communication link with one at the transmitting end thereof, said motors respectively driving drums at the receiving and transmitting ends of said link, said receiving end including means responsive to the receiving end drum for generating a reception phase signal each rotation of the receiving end drum and said transmitting end including means responsive to the transmitting end drum for generating a transmission phase signal each rotation of the transmitting end drum, said circuit comprising a phase synchronizing circuit for repeatedly applying to the main coils of the receiving end motor reduced frequency signals having a lower frequency than the rated frequency thereof to thereby reduce the phase deviation between the receiving and transmitting end motors, said phase synchronizing circuit generating each reduced frequency signal upon each occurence of said reception phase signal and terminating each reduced frequency signal upon each occurrence of said transmission phase signal, said reduced frequency signals being applied to said main coils until said reception and transmission phase signals are brought into phase; and means for maintaining the application of said reduced frequency signals to said main coils of the receiving end motor during the starting time of the receiving end motor even though the reception and transmission phase signals may temporarily be in phase during the starting time.