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US4020361A Expired / Lapsed US ⏱️ 0.0 years remaining

Switching mode power controller of large dynamic range

Assignee: Delta Electronic Control Corp
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Filing: 1974-10-04
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Granted: 1977-04-26
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Expires: 1994-10-04
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Abstract

Abstract This invention concerns improvements in the switching control of power or voltage into a load. Specifically it is concerned with a new time sequencing technique for the switching states of a four-switch configuration for the purpose of producing a three-state, pulse-duration-modulated output having a more ideal waveform and consequently better fidelity in the synthesis of a desired output signal. The new sequencing technique permits pulses of short time duration to be produced without requiring individual switches to recover quickly after having changed states from on to off or from off to on. This results in short pulses being produced with greater accuracy in the length of the pulse and consequently extends the useful dynamic range available at the output.

Inventors

  • 👤 Larry R. Suelzle
  • 👤 Leonard O. Hodges

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 16:55
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/53; H02M7/537; H02M7/5387; H02M7/53871; Y; Y10; Y10S; Y10S388/00; Y10S388/907; Y10S388/91; Y10S388/915

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 233 words
In a circut for producing a three state, PDM output, the combination comprising a. switches S 1 and S 3 connected in series and across a voltage source, S 1 and S 3 being in opposite states of conduction, b. switches S 2 and S 4 connected in series and across the voltage source S 2 and S 4 being in opposite states of conduction, c. a load with one end connected with the common point between switches S 1 and S 3 and the other end connected with the common point between switch S 2 and S 4 , and d. means to produce a short pulse of interval Δt across the load by controlling the switches to switch from one of the two states which produce 0 voltage across the load (S 1 ON and S 2 ON, or S 3 ON and S 4 ON), to an intermediate state where voltage is produced across the load (S 1 ON and S 4 ON, or S 3 ON and S 2 ON), and then to other 0 voltage state, said means including a wave generator and comparator means responsive to the output of the wave generator and to an input signal waveform V s to produce a first comparison output for controlling S 1 and S 3 , and a second comparison output for controlling S 2 and S 4 .
Claim 2
Dependent Claim 233 words
In a circut for producing a three state, PDM output, the combination comprising a. switches S 1 and S 3 connected in series and across a voltage source, S 1 and S 3 being in opposite states of conduction, b. switches S 2 and S 4 connected in series and across the voltage source S 2 and S 4 being in opposite states of conduction, c. a load with one end connected with the common point between switches S 1 and S 3 and the other end connected with the common point between switch S 2 and S 4 , and d. means to produce a short pulse of interval Δt across the load by controlling the switches to switch from one of the two states which produce 0 voltage across the load (S 1 ON and S 2 ON, or S 3 ON and S 4 ON), to an intermediate state where voltage is produced across the load (S 1 ON and S 4 ON, or S 3 ON and S 2 ON), and then to other 0 voltage state, said means including a wave generator and comparator means responsive to the output of the wave generator and to an input signal waveform V s to produce a first comparison output for controlling S 1 and S 3 , and a second comparison output for controlling S 2 and S 4 .
Claim 3
Dependent Claim 89 words
The circuit of claim 1 wherein said comparator means includes two comparators and is operable to cause a shift from a state where S 1 and S 2 (or S 3 and S 4 ) are both ON to the state where S 3 and S 4 (or S 1 and S 2 ) are both ON by first turning one and then the other of S 3 or S 4 (or S 1 or S 2 ) to ON states at sequential initiation times defining the interval Δt.
Claim 4
Dependent Claim 22 words
The circuit of claim 2 wherein said generator comprises a triangular wave generator having a triangular wave output connected with both comparators.
Claim 5
Dependent Claim 56 words
The circuit of claim 2 wherein the first comparator is responsive to values of V s of one polarity, and said first named means includes an inverter responsive to V s and having an output connected to the second comparator so that the second comparator is responsive to values of V s of the opposite polarity.
Claim 6
Dependent Claim 11 words
The circuit of claim 1 wherein the switches comprise power transistors.
Claim 7
Dependent Claim 19 words
The circuit of claim 1 including diodes connected across each of the switches S 1 to S 4 .
Claim 8
Dependent Claim 15 words
The circuit of claim 4 including a filter connected at the input to the load.
Claim 9
Dependent Claim 14 words
The circuit of claim 1 including said voltage source, which is a DC source.
Claim 10
Dependent Claim 214 words
In a circuit for producing a three state, PDM output, the combination comprising a. switches S 1 and S 3 connected in series and across a voltage source, S 1 and S 3 being in opposite states of conduction, b. switches S 2 and S 4 connected in series and across the voltage source, S 2 and S 4 being in opposite states of conduction, c. said source being a DC source which includes effectively two DC supplies having a common connection therebetween, d. and a load having one end connected with said common connection, and the other end connected with the center tap of a transformer, one end of said transformer connected with the common point of S 1 and S 3 , and the other end of said transformer connected with the common point of S 2 and S 4 , and the conduction states of S 2 and S 4 interchanged, e. and control means operatively connected with said switches and including a wave generator and comparator means responsive to the output of the wave generator and to an input signal waveform V s to produce a first comparison output for controlling S 1 and S 3 , and a second comparison output for controlling S 2 and S 4 .
Claim 11
Dependent Claim 214 words
In a circuit for producing a three state, PDM output, the combination comprising a. switches S 1 and S 3 connected in series and across a voltage source, S 1 and S 3 being in opposite states of conduction, b. switches S 2 and S 4 connected in series and across the voltage source, S 2 and S 4 being in opposite states of conduction, c. said source being a DC source which includes effectively two DC supplies having a common connection therebetween, d. and a load having one end connected with said common connection, and the other end connected with the center tap of a transformer, one end of said transformer connected with the common point of S 1 and S 3 , and the other end of said transformer connected with the common point of S 2 and S 4 , and the conduction states of S 2 and S 4 interchanged, e. and control means operatively connected with said switches and including a wave generator and comparator means responsive to the output of the wave generator and to an input signal waveform V s to produce a first comparison output for controlling S 1 and S 3 , and a second comparison output for controlling S 2 and S 4 .
Claim 12
Dependent Claim 47 words
The circuit of claim 1 wherein said comparator means includes two comparators each of which is connected to receive as inputs the wave generator output and V s , one of such inputs to one comparator being inverted relative to its corresponding input to the other comparator.
Claim 13
Dependent Claim 47 words
The circuit of claim 9 wherein said comparator means includes two comparators each of which is connected to receive as inputs the wave generator output and V s , one of such inputs to one comparator being inverted relative to its corresponding input to the other comparator.

References Cited (Backward Citations)

US3175167A Cited
US3260912A Cited
US3525029A Cited
US3523228A Cited
US3706923A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-04-25 1980-10-25 1981-04-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-04-25 1984-10-25 1985-04-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-04-25 1988-10-25 1989-04-26 $7700.00 Window Closed / Lapsed

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