US4017749A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistor circuit including source voltage ripple removal
Assignee: Hitachi Ltd
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Filing: 1976-03-23
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Granted: 1977-04-12
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Expires: 1996-03-23
Abstract
Abstract In a transistor circuit comprising a monolithic semiconductor integrated circuit including at least one first conductivity type transistor having a base connected to a signal input terminal, a collector connected to an output terminal and also connected to a source voltage supply terminal through a collector load resistance, and an emitter connected to a reference potential through an emitter resistance, and a voltage dividing resistance circuit connected externally to the integrated circuit to establish a base-emitter biasing voltage of the first conductivity type transistor, another resistance element is provided between the source voltage supply terminal and the load resistance and a second conductivity type transistor is provided with the emitter and the collector connected to the interconnection point of the two resistances and the reference potential, respectively, and the base connected to the emitter of the first conductivity type transistor, integrating a source voltage ripple removing circuit in the integrated circuit. This transistor circuit is adapted for a high output power integrated circuit and provides a wide range of operable source voltage as well as the removal of the ac ripple voltage component of the voltage source and the reduction in the number of external connecting pins.
Inventors
- 👤 Kunio Seki
- 👤 Yukio Suzuki
- 👤 Yoshio Sakamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 17:40
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3083; H03F3/3086; H03F3/3091; H03F1/00; H03F1/30; H03F1/302
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
219 words
A transistor circuit comprising a source voltage supply terminal, a first conductivity type transistor, collector load means, emitter impedance means for said first conductivity type transistor, first voltage dividing biasing means, second voltage dividing biasing means, a source voltage ripple removing impedance, and a source voltage ripple removing second conductivity type transistor, said first conductivity type transistor having an emitter connected to a reference potential through said emitter impedance means, a collector connected to one end of said collector load means, the other end of said collector load means connected to one end of said source voltage ripple removing impedance, the other end of said source voltage ripple removing impedance connected to said source voltage supply terminal, said first and second voltage dividing biasing means connected in series to each other between said source voltage supply terminal and the reference potential, the biasing voltage for the base-emitter junction of said first conductivity type transistor set by the voltage generated at an interconnection point between said first and second voltage dividing biasing means, and said source voltage removing second conductivity type transistor having an emitter connected to the interconnection point of said collector load means and said source voltage ripple removing impedance, a base to the emitter of said first conductivity type transistor, and a collector to the reference potential.
Claim 2
Dependent Claim
219 words
A transistor circuit comprising a source voltage supply terminal, a first conductivity type transistor, collector load means, emitter impedance means for said first conductivity type transistor, first voltage dividing biasing means, second voltage dividing biasing means, a source voltage ripple removing impedance, and a source voltage ripple removing second conductivity type transistor, said first conductivity type transistor having an emitter connected to a reference potential through said emitter impedance means, a collector connected to one end of said collector load means, the other end of said collector load means connected to one end of said source voltage ripple removing impedance, the other end of said source voltage ripple removing impedance connected to said source voltage supply terminal, said first and second voltage dividing biasing means connected in series to each other between said source voltage supply terminal and the reference potential, the biasing voltage for the base-emitter junction of said first conductivity type transistor set by the voltage generated at an interconnection point between said first and second voltage dividing biasing means, and said source voltage removing second conductivity type transistor having an emitter connected to the interconnection point of said collector load means and said source voltage ripple removing impedance, a base to the emitter of said first conductivity type transistor, and a collector to the reference potential.
Claim 3
Dependent Claim
239 words
A transistor circuit comprising a source voltage supply terminal, first conductivity type differential pair transistors, collector load means, emitter impedance means, first voltage dividing biasing means, second voltage dividing biasing means, a source voltage ripple removing impedance, and a source voltage ripple removing second conductivity type transistor, said first conductivity type differential pair transistors having respective emitters connected in common to a reference potential through said emitter impedance means, one end of said collector load means connected to the collector of one transistor of said first conductivity type differential pair transistors, the other end of said collector load means connected to one end of said source voltage ripple removing impedance, the other end of said source voltage ripple removing impedance connected to said source voltage supply terminal, said first and second voltage dividing biasing means connected in series to each other between said source voltage supply terminal and the reference potential, the biasing voltages for the respective base-emitter junctions of said first conductivity type differential pair transistors set by the voltage generated at an interconnection point between said first and second voltage dividing biasing means, said source voltage ripple removing second conductivity type transistor having an emitter connected to the interconnection point of said collector load means and said source voltage ripple removing impedance, a base to the interconnection point of the respective emitters of said first conductivity type differential pair transistors and a collector to said reference potential.
Claim 4
Dependent Claim
239 words
A transistor circuit comprising a source voltage supply terminal, first conductivity type differential pair transistors, collector load means, emitter impedance means, first voltage dividing biasing means, second voltage dividing biasing means, a source voltage ripple removing impedance, and a source voltage ripple removing second conductivity type transistor, said first conductivity type differential pair transistors having respective emitters connected in common to a reference potential through said emitter impedance means, one end of said collector load means connected to the collector of one transistor of said first conductivity type differential pair transistors, the other end of said collector load means connected to one end of said source voltage ripple removing impedance, the other end of said source voltage ripple removing impedance connected to said source voltage supply terminal, said first and second voltage dividing biasing means connected in series to each other between said source voltage supply terminal and the reference potential, the biasing voltages for the respective base-emitter junctions of said first conductivity type differential pair transistors set by the voltage generated at an interconnection point between said first and second voltage dividing biasing means, said source voltage ripple removing second conductivity type transistor having an emitter connected to the interconnection point of said collector load means and said source voltage ripple removing impedance, a base to the interconnection point of the respective emitters of said first conductivity type differential pair transistors and a collector to said reference potential.
Claim 5
Dependent Claim
44 words
A transistor circuit according to claim 1, in which the emitter of said source voltage ripple removing second conductivity type transistor is connected to the interconnection point of said collector load means and said source voltage ripple removing impedance through constant voltage biasing means.
Claim 6
Dependent Claim
18 words
A transistor circuit according to claim 3, in which said constant voltage biasing means is a Zener diode.
Claim 7
Dependent Claim
19 words
A transistor circuit according to claim 3, in which said constant voltage biasing means is a forward biased diode.
Claim 8
Dependent Claim
54 words
A transistor circuit according to claim 3, in which said interconnection point of said first and second voltage dividing biasing means is connected to the base of said first conductivity type transistor through an input resistance, and a source voltage ripple removing capacitor is connected in parallel with said second voltage dividing biasing means.
Claim 9
Dependent Claim
39 words
A transistor circuit according to claim 2, in which the emitter of said source voltage ripple removing second conductivity type transistor is connected to the interconnection point of said collector load means and said source voltage ripple removing impedance.
Claim 10
Dependent Claim
60 words
A transistor circuit according to claim 7, in which said interconnection point of said first and second voltage dividing biasing means is connected to the base of the other transistor of said first conductivity type differential pair transistors through an input resistor, and a source voltage ripple removing capacitor is connected in parallel with said second voltage dividing biasing means.
Claim 11
Dependent Claim
36 words
A transistor circuit according to claim 8, in which said first voltage dividing biasing means is connected to said source voltage supply terminals through a source voltage ripple removing filter including a capacitor and a resistor.
Claim 12
Dependent Claim
53 words
A transistor circuit according to claim 9, in which the base of said source voltage ripple removing second conductivity type transistor is connected to the interconnection point of the commonly connected emitters of said first conductivity type differential pair transistors through the emitter-base junction of the other transistor of the first conductivity type.
Claim 13
Dependent Claim
18 words
A transistor circuit according to claim 9, in which said constant voltage biasing means is a Zener diode.
Claim 14
Dependent Claim
19 words
A transistor circuit according to claim 9, in which said constant voltage biasing means is a forward biased diode.
Claim 15
Dependent Claim
154 words
A monolithic semiconductor integrated circuit comprising: an input amplifier including at least one first conductivity type transistor having a base connected to the signal input terminal, a collector connected to the signal output terminal and an emitter connected to one end of the emitter biasing resistor means, a source voltage supply terminal, a reference potential terminal, and load resistance means connected between said voltage supply terminal and said collector, the other end of said emitter biasing resistor means connected to said reference potential terminal; and a source voltage ripple removing circuit including voltage dividing resistance means provided between said voltage supply terminal and said collector load resistance means, and a second conductivity type transistor having an emitter connected to the interconnection point of said voltage dividing resistance means and said collector load means, a base connected to the emitter of said first conductivity type transistor, and a collector connected to said reference potential terminal.
Claim 16
Dependent Claim
154 words
A monolithic semiconductor integrated circuit comprising: an input amplifier including at least one first conductivity type transistor having a base connected to the signal input terminal, a collector connected to the signal output terminal and an emitter connected to one end of the emitter biasing resistor means, a source voltage supply terminal, a reference potential terminal, and load resistance means connected between said voltage supply terminal and said collector, the other end of said emitter biasing resistor means connected to said reference potential terminal; and a source voltage ripple removing circuit including voltage dividing resistance means provided between said voltage supply terminal and said collector load resistance means, and a second conductivity type transistor having an emitter connected to the interconnection point of said voltage dividing resistance means and said collector load means, a base connected to the emitter of said first conductivity type transistor, and a collector connected to said reference potential terminal.
Claim 17
Dependent Claim
38 words
A transistor circuit according to claim 13, further comprising constant voltage biasing means connected between the interconnection point of said voltage dividing resistance means and said collector load means and the emitter of said second conductivity type transistor.
Claim 18
Dependent Claim
47 words
A transistor circuit according to claim 13, further comprising biasing voltage dividing circuit connected between said source voltage supply terminal and said reference potential terminal and biasing the base of said first conductivity type transistor with the dc bias voltage generated in said biasing voltage dividing circuit.
Claim 19
Dependent Claim
48 words
A transistor circuit according to claim 15, in which said biasing voltage dividing circuit comprises a series connection of a first and a second voltage dividing biasing means, and said ripple removing circuit further comprises a filtering capacitor connected in parallel with said second voltage dividing biasing means.
References Cited (Backward Citations)
US3843935A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-04-11 | 1980-10-11 | 1981-04-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-04-11 | 1984-10-11 | 1985-04-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-04-11 | 1988-10-11 | 1989-04-12 | $7700.00 | Window Closed / Lapsed |