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US4013955A Expired / Lapsed US ⏱️ 0.0 years remaining

Analog signal processor

Assignee: United States Department of the Navy
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Filing: 1975-07-02
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Granted: 1977-03-22
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Expires: 1995-07-02
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Abstract

Abstract An analog signal processor that is particularly suitable for measuring, igrating and holding a single or a pair of analog signals. The input signal to the analog signal processor may be sinusoidal of relatively low frequency and of low signal strength and slowly varying phase such as may be obtained from a pair of capacitive plates used in electric field measuring devices. The analog signal processor includes an analog current to voltage convertor, a synchronous rectifier and an integrate and hold circuit. In practice the analog signal processor may be mounted on a rotating shaft and converts the very low differentially alternating current input to a proportional d.c. voltage output. The analog signal processor includes timing and switching circuits to provide the desired information about vertical, horizontal and inclined electric fields.

Inventors

  • 👤 Peter B. Wagner

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 20:10
CPC Classifications
G; G01; G01R; G01R29/00; G01R29/12

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 236 words
A analog signal processor comprising: a. an analog current to voltage convertor; b. a synchronous rectifier; c. an integrate and hold circuit; d. said analog current to voltage convertor includes first and second operational amplifiers; e. first current means for producing a first alternating current signal and second current means for producing a second alternating current signal that is 180° out of phase with respect to said first alternating current signal; f. said first current means being connected to the input of said first operational amplifier; g. said second current means being connected to the input of said second operational amplifier; h. the output of said first operational amplifier and the output of said second operational amplifier being connected to the input of said synchronous rectifier; i. means for controlling said synchronous rectifier whereby the negative portion of the output siganl from said second operation amplifier is inverted and added to the positive portion of the output signal from said first operational amplifier and the negative portion of the output signal from said first operational amplifier is inverted and added to the positive portion of the output signal from said second operational amplifier; j. the output of said synchronous rectifier being connected to the input of said integrate and hold circuit; whereby k. the output of said integrate and hold circuit indicates a d.c. voltage output that is proportional to the output of said synchronous rectifier.
Claim 2
Dependent Claim 236 words
A analog signal processor comprising: a. an analog current to voltage convertor; b. a synchronous rectifier; c. an integrate and hold circuit; d. said analog current to voltage convertor includes first and second operational amplifiers; e. first current means for producing a first alternating current signal and second current means for producing a second alternating current signal that is 180° out of phase with respect to said first alternating current signal; f. said first current means being connected to the input of said first operational amplifier; g. said second current means being connected to the input of said second operational amplifier; h. the output of said first operational amplifier and the output of said second operational amplifier being connected to the input of said synchronous rectifier; i. means for controlling said synchronous rectifier whereby the negative portion of the output siganl from said second operation amplifier is inverted and added to the positive portion of the output signal from said first operational amplifier and the negative portion of the output signal from said first operational amplifier is inverted and added to the positive portion of the output signal from said second operational amplifier; j. the output of said synchronous rectifier being connected to the input of said integrate and hold circuit; whereby k. the output of said integrate and hold circuit indicates a d.c. voltage output that is proportional to the output of said synchronous rectifier.
Claim 3
Dependent Claim 36 words
The analog signal processor of claim 1 including: a. said integrate and hold circuit including an amplifier; and b. an integrate switch connected between the output of said synchronous rectifier and the input of said amplifier.
Claim 4
Dependent Claim 21 words
The analog signal processor of claim 2 including: a. a hold switch connected between said input of said amplifier and ground.
Claim 5
Dependent Claim 22 words
The analog signal processor of claim 3 including: a. an integrating capacitor connected between the input and the output of said amplifier.
Claim 6
Dependent Claim 41 words
The analog signal processor of claim 4 including: a. first and second dump switches connected in series with each other and in parallel with said integrating capacitor; and b. a resistor connected between said first and second dump switches and ground.
Claim 7
Dependent Claim 71 words
The analog signal processor of claim 5 including: a. switch control means for closing said integrate switch and opening said hold and first and second dump switches during the 360° time period of said first and second alternating current signals, then closing said hold switch and opening said integrate and first and second dump switch and then opening said integrate and hold switch and closing said first and second dump switches.

References Cited (Backward Citations)

US3238383A Cited
US3305769A Cited
US3491252A Cited
US3480794A Cited
US3539936A Cited
US3564387A Cited
US3586973A Cited
US3825816A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-03-21 1980-09-20 1981-03-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-03-21 1984-09-20 1985-03-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-03-21 1988-09-20 1989-03-22 $7700.00 Window Closed / Lapsed

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