US4011558A
Expired / Lapsed
US
⏱️ 0.0 years remaining
DC gas panel electrical display device
Assignee: US Philips Corp
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Filing: 1974-10-22
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Granted: 1977-03-08
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Expires: 1994-10-22
Abstract
Abstract An electrical display device which is adapted for operation in the storage mode wherein the addressing circuit arrangement of the device is arranged to effect block write/random erase addressing and includes a first sub-matrix of erase driver circuits for supplying erase pulses to column conductors, each of said sub-matrices comprising in respect of each conductor to be energized of the appertaining conductor group (row or column) a cross-point output formed by the interconnection of two unique co-ordinate erase driver circuit outputs. Each cross-point output includes a pair of diodes through which the two erase driver circuit outputs are connected respectively to form the cross-point output.
Inventors
- 👤 Graham Trevor Sharpless
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 12:34
CPC Classifications
H; H04; H04N; H04N3/00; H04N3/10; H04N3/12; H04N3/125; G; G09; G09G; G09G3/00; G09G3/20; G09G3/22; G09G3/28; G09G3/282; G09G3/30; G09G3/32; H04N3/14
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
167 words
An electrical display device which comprises a DC gas panel having row conductors and column conductors, an addressing circuit arranged to effect block write/random erase addressing which includes a first sub-matrix of erase driver circuits for supplying erase pulses to the row conductors and a second sub-matrix of erase driver circuits for supplying erase pulses to the column conductors, each of said sub-matrices comprising in respect of each conductor to be energised of the appertaining conductor group (row or column) a cross-point output formed by the interconnection of two unique co-ordinate erase driver circuit outputs, means for providing isolation for the DC gas panel which comprise a pair of diodes at each cross-point output through which the two erase driver circuit outputs are connected respectively to form the cross-point output, said diodes being connected to isolate operationally each cross-point output from the other cross-point outputs of the same sub-matrix, while permitting the application of the appropriate erase and bias voltage amplitudes across the elements of the matrix.
Claim 2
Dependent Claim
167 words
An electrical display device which comprises a DC gas panel having row conductors and column conductors, an addressing circuit arranged to effect block write/random erase addressing which includes a first sub-matrix of erase driver circuits for supplying erase pulses to the row conductors and a second sub-matrix of erase driver circuits for supplying erase pulses to the column conductors, each of said sub-matrices comprising in respect of each conductor to be energised of the appertaining conductor group (row or column) a cross-point output formed by the interconnection of two unique co-ordinate erase driver circuit outputs, means for providing isolation for the DC gas panel which comprise a pair of diodes at each cross-point output through which the two erase driver circuit outputs are connected respectively to form the cross-point output, said diodes being connected to isolate operationally each cross-point output from the other cross-point outputs of the same sub-matrix, while permitting the application of the appropriate erase and bias voltage amplitudes across the elements of the matrix.
Claim 3
Dependent Claim
46 words
A device as claimed in claim 1, wherein one of said first and second sub-matrices includes a single group of write driver circuits which have their outputs paralleled with the outputs of one group of erase driver circuits of the matrix at the cross-point outputs thereof.
Claim 4
Dependent Claim
45 words
A device as claimed in claim 2, wherein said single group of write driver circuits is arranged to block write the element rows pertaining to an entire line of characters, and wherein selective erasure of elements in these rows to form characters is effected column-by-column.
Claim 5
Dependent Claim
109 words
A device as claimed in claim 1, wherein each erase driver circuit comprises a normally conductive transistor through which a connection is established for applying the bias voltage across the appertaining elements of the matrix, the transistor of each erase driver circuit of the first sub-matrix being connected between first and second voltage levels and the transistor of each erase driver circuit of the second sub-matrix being connected between third and fourth voltage levels, said bias voltage being established by said first and fourth voltage levels when the transistors are conductive and an erase voltage being established by said second and third voltage levels when the transistors are non-conductive.
Claim 6
Dependent Claim
57 words
A device as claimed in claim 1, wherein each write driver circuit comprises a normally non-conductive transistor through which a connection is established for applying a strike voltage across the appertaining element row(s) of the matrix when this transistor is rendered conductive, said strike voltage being established by a fifth voltage level and said first voltage level.
Claim 7
Dependent Claim
22 words
An electrical display device as claimed claim 1 wherein the two-dimensional matrix of light-emitting elements is a matrix of glow discharge cells.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-03-07 | 1980-09-06 | 1981-03-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-03-07 | 1984-09-06 | 1985-03-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-03-07 | 1988-09-06 | 1989-03-08 | $7700.00 | Window Closed / Lapsed |