US4009059A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Reverse conducting thyristor and process for producing the same
Assignee: Mitsubishi Electric Corp
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Filing: 1975-04-15
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Granted: 1977-02-22
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Expires: 1995-04-15
Abstract
Abstract A circular semiconductor wafer includes a thyristor surrounded by a diode through an annular V-shaped groove-filled with glass. That face of the wafer near to the extremity of the groove is disposed on a molybdenum plate through a brazing layer. A base layer on both faces of the wafer has those portions extending through the associated emitter region at predetermined positions to be exposed to the wafers face to form degenerate P-N junctions on and adjacent that face with the adjacent emitter portions. The brazing layer and the opposite electrode for the thyristor include small openings looking the exposed portions of the base layers and the adjacent emitter portions respectively.
Inventors
- 👤 Josuke Nakata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 19:30
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/101; H10D84/131; H10D84/135; H10D84/136; Y; Y10; Y10S; Y10S438/00; Y10S438/928
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
278 words
A process fabricating a thyristor device, comprising the steps of: a. providing a semiconductor substrate of a first conductivity type and having a pair of opposed major surfaces; b. diffusing impurity atoms of said first conductivity type into said semiconductor substrate to form a region in said substrate at one of said major surfaces and extending into said substrate and which is higher in impurity concentration than the remainder of said substrate; c. diffusing impurity atoms of a second conductivity into said semiconductor substrate to form a region in said substrate at the other of said major surfaces and extending into said substrate and which has a conductivity type opposite that of said substrate; d.diffusing impurity atoms of said second conductivity type into the region of high impurity concentration of said first conductivity type to form a surface region of said second conductivity type extending from said one of said major surfaces into said region of high impurity concentration and forming therewith a PN junction, said surface region of said second conductivity type being formed to expose portions of said high impurity concentration region which extend to said one of said major surfaces of said substrate; and e. diffusing impurity atoms of said first conductivity type into said region of said second conductivity type at said other of said major surfaces to form thereat and extending into said region of said second conductivity type a second surface region of said first conductivity type and forming therewith a PN junction, said second surface region being formed to expose portions of said region of said second conductivity type which extend to said other of said major surfaces of said substrate.
Claim 2
Dependent Claim
278 words
A process fabricating a thyristor device, comprising the steps of: a. providing a semiconductor substrate of a first conductivity type and having a pair of opposed major surfaces; b. diffusing impurity atoms of said first conductivity type into said semiconductor substrate to form a region in said substrate at one of said major surfaces and extending into said substrate and which is higher in impurity concentration than the remainder of said substrate; c. diffusing impurity atoms of a second conductivity into said semiconductor substrate to form a region in said substrate at the other of said major surfaces and extending into said substrate and which has a conductivity type opposite that of said substrate; d.diffusing impurity atoms of said second conductivity type into the region of high impurity concentration of said first conductivity type to form a surface region of said second conductivity type extending from said one of said major surfaces into said region of high impurity concentration and forming therewith a PN junction, said surface region of said second conductivity type being formed to expose portions of said high impurity concentration region which extend to said one of said major surfaces of said substrate; and e. diffusing impurity atoms of said first conductivity type into said region of said second conductivity type at said other of said major surfaces to form thereat and extending into said region of said second conductivity type a second surface region of said first conductivity type and forming therewith a PN junction, said second surface region being formed to expose portions of said region of said second conductivity type which extend to said other of said major surfaces of said substrate.
Claim 3
Dependent Claim
41 words
A process according to claim 1, further comprising: forming a metallic electrode on each of the major surfaces of said substrate, each electrode having openings surrounding and spaced from the respective exposed portions of said first and said second surface regions.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-02-22 | 1980-08-23 | 1981-02-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-02-22 | 1984-08-23 | 1985-02-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-02-22 | 1988-08-23 | 1989-02-22 | $7700.00 | Window Closed / Lapsed |