US4006427A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Automatic gain control circuit
Assignee: SHIN-SHIRASUNA ELECTRIC Corp
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Filing: 1976-04-02
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Granted: 1977-02-01
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Expires: 1996-04-02
Abstract
Abstract In a recording system or the like including two, left and right, channels, an automatic gain control circuit for ensuring that the characteristics of the two channels always be substantially equal to each other, wherein a variable impedance circuit comprising at least one transistor is provided in association with each of the foregoing channels; a correcting variable resistor is connected between the bases of the transistors; and a control signal source is provided which has one terminal thereof connected to the movable contact of the correcting variable resistor, the other terminal of the control signal source being grounded and connected across the correcting variable resistors through shunt resistors.
Inventors
- 👤 Masao Nishikawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 18:31
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3005; H03G3/301; H03G3/3015
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
149 words
An automatic gain control circuit for recording systems or the like including two channels, wherein first and second variable impedance circuits each comprising at least one transistor are associated with said two channels respectively so that the gains of the respective channels can be controlled by changing the impedances of said variable impedance circuits in accordance with the base currents of said transistors, characterized in that a correcting variable resistor provided with a movable contact is connected at the opposite ends thereof to the bases of the transistors constituting said first and second variable impedance circuits respectively, said movable contact being connected to one terminal of a control signal source the other end of which is connected to the opposite ends of said correcting variable resistor through a first shunt resistor and second shunt resistor respectively, and that a coupling resistor is connected between the bases of said transistors.
Claim 2
Dependent Claim
149 words
An automatic gain control circuit for recording systems or the like including two channels, wherein first and second variable impedance circuits each comprising at least one transistor are associated with said two channels respectively so that the gains of the respective channels can be controlled by changing the impedances of said variable impedance circuits in accordance with the base currents of said transistors, characterized in that a correcting variable resistor provided with a movable contact is connected at the opposite ends thereof to the bases of the transistors constituting said first and second variable impedance circuits respectively, said movable contact being connected to one terminal of a control signal source the other end of which is connected to the opposite ends of said correcting variable resistor through a first shunt resistor and second shunt resistor respectively, and that a coupling resistor is connected between the bases of said transistors.
Claim 3
Dependent Claim
125 words
An automatic gain control circuit according to claim 1, wherein each of said first and second variable impedance circuits is constituted by a first transistor and a second transistor having the base thereof connected to the emitter of said first transistor, said coupling resistor is connected between the bases of said first transistors, said variable resistor is connected at the opposite ends thereof to the bases of said first transistors, and said control signal source is constituted by a capacitor having one terminal thereof grounded, the grounded terminal of said capacitor being connected to the opposite ends of said variable resistor through said first and second shunt resistors respectively, the other terminal of said capacitor being connected to said movable contact of said variable resistor.
References Cited (Backward Citations)
US3177441A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-02-01 | 1980-08-02 | 1981-02-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-02-01 | 1984-08-02 | 1985-02-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-02-01 | 1988-08-02 | 1989-02-01 | $7700.00 | Window Closed / Lapsed |