Semiconductor device with memory effect

Claim 2

A semiconductor device with memory effect comprising: a semiconductor material body containing a p-n heterojunction between two p-type and n-type regions; the n-type region is made of a n-type indirect gap material and the p-type region is made of a p-type direct gap material; the indirect gap of said n-type material is wider than that indirect gap of said p-type material at the corresponding position in wavevector space; the indirect gap conduction band minima in said n-type material are higher in energy than the corresponding indirect gap conduction band minima in said p-type material, at said p-n heterojunction; aid heterojunction exhibits a spike-notch structure in the indirect gap conduction band minima and a spike-notch structure in the direct gap conduction band minima; said heterojunction affording two mechanisms for electron flow from the n-type region to the p-type region including a slow mechanism and a fast mechanism and effecting switching from said slow mechanism and said fast mechanism, by avalanche filling of the direct notch with direct electrons, due to the enhancement of the electron-electron interaction; said interaction occurring between indirect electrons injected over the indirect spike and said direct electrons which already exist in the direct notch; said avalanche filling being produced when a critical value of the notch electron population is exceeded; the switching from said fast mechanism to said slow mechanism being effected by emptying of said direct notch due to the attenuation of said electron-electron interaction, said emptying being produced when said notch electron population decreases below a critical value; and circuiting means for biasing said p-n heterojunction and coupling it with a load with a variable external voltage so that a current-voltage characteristic which exhibits two branches, the OFF branch and the ON branch, and a hysteresis loop is produced, the operating point being on said OFF branch of the current-voltage characteristic, when a critical point ON is exceeded, determined by a critical voltage level ON and by a critical level ON, the latter levels being correlated with an increase of said notch electron population over a critical value, the device switches on said ON branch of the current-voltage characteristic; the operating point being on said ON branch of the current-voltage characteristic and decreasing the bias, when a critical point OFF, determined by a critical voltage level OFF and a critical current level OFF is exceeded, the latter levels being correlated with a decrease of said notch electron population below a critical valve, the device switches on said OFF branch of the current-voltage characteristic; said hysteresis loop being defined by said two branches of the current-voltage characteristic and by two load lines which pass through said ON and OFF critical points.

Claim 3

A semiconductor device according to claim 1, wherein the p-type region and n-type region have close doping levels.

Claim 4

A semiconductor device according to claim 2, wherein the doping levels are below 10 16 cm.sup. -3 .

Claim 5

A semiconductor device according to claim 3, wherein there is an abrupt transition from the p-type region to the n-type region and there are no interface states.

Claim 6

A semiconductor device according to claim 3, wherein energy difference between the direct and indirect conduction band minima of the p-type semiconductor is small enough to assure the mixing of both band wave functions in order to describe the localized states.

Claim 7

A semiconductor device according to claim 5, wherein the n-type and p-type regions are made of semiconductor materials belonging to III x III' 1 -x V or III V x V' 1 - x families, which can be direct or indirect materials depending on composition.

Claim 8

A semiconductor device according to claim 6, wherein the n-type region is made of indirect Al x Ga 1 -x As, with x>0.37, and the p-type region is made of direct Al y Ga 1 -y As, with y<0.37.

Claim 9

A bistable memory-effect semiconductor device comprising a semiconductor material body containing a p-n heterojunction between the p-type and n-type regions; the n-type region is made of a n-type indirect gap material and the p-type region is made of a p-type direct gap material; the indirect gap of said n-type material is wider than that indirect gap of said p-type material at corresponding position in wavevector space; the indirect gap conduction band minima in said n-type material are higher in energy than the corresponding indirect gap conduction band minima in said p-type material, at said p-n heterojunction; said heterojunction exhibits a spike-notch structure in the indirect gap conduction band minima and a spike-notch structure in the direct gap conduction band minima; said heterojunction affording two mechanisms for electron flow from said n-type region to the p-type region, including a slow mechanism and a fast mechanism; the switching from said slow mechanism to said fast mechanism being done by avalanche filling of the direct notch with direct electrons due to the enhancement of the electron-electron interaction; said interaction occurring between indirect electrons injected over the indirect spike and said direct electrons which already exist in the direct notch; said avalanche filling being produced when a critical value of the notch electron population is exceeded; the switching from said fast mechanism to said slow mechanism being done by emptying of said direct notch due to attenuation of said electron-electron interaction, said emptying being produced when said notch electron population decreases below a critical value; and circuit means for biasing said p-n heterojunction coupled with a load with a fixed external voltage so that to said fixed voltage correspond two stable states, OFF and ON, whose operating points are situated on the OFF, respectively ON, branches of the current-voltage characteristic; said circuit means applying voltage pulses of predetermined amplitude and polarity; whereby when a pulse having the same polarity as the fixed voltage is applied so that the total voltage applied to the heterojunction exceeds a critical point ON, correlated with increasing of said notch electron population over a critical value, the device switches from said OFF state to said ON state; and whereby when a pulse of inverse polarity compared with fixed voltage is applied so that the total voltage applied to said heterojunction decreases below a critical point OFF, correlated with a decrease of said notch electron population below a critical value, the device switches from the ON state to the OFF state.

Claim 10

A bistable memory-effect semiconductor device comprising a semiconductor material body containing a p-n heterojunction between the p-type and n-type regions; the n-type region is made of a n-type indirect gap material and the p-type region is made of a p-type direct gap material; the indirect gap of said n-type material is wider than that indirect gap of said p-type material at corresponding position in wavevector space; the indirect gap conduction band minima in said n-type material are higher in energy than the corresponding indirect gap conduction band minima in said p-type material, at said p-n heterojunction; said heterojunction exhibits a spike-notch structure in the indirect gap conduction band minima and a spike-notch structure in the direct gap conduction band minima; said heterojunction affording two mechanisms for electron flow from said n-type region to the p-type region, including a slow mechanism and a fast mechanism; the switching from said slow mechanism to said fast mechanism being done by avalanche filling of the direct notch with direct electrons due to the enhancement of the electron-electron interaction; said interaction occurring between indirect electrons injected over the indirect spike and said direct electrons which already exist in the direct notch; said avalanche filling being produced when a critical value of the notch electron population is exceeded; the switching from said fast mechanism to said slow mechanism being done by emptying of said direct notch due to attenuation of said electron-electron interaction, said emptying being produced when said notch electron population decreases below a critical value; and circuit means for biasing said p-n heterojunction coupled with a load with a fixed external voltage so that to said fixed voltage correspond two stable states, OFF and ON, whose operating points are situated on the OFF, respectively ON, branches of the current-voltage characteristic; said circuit means applying voltage pulses of predetermined amplitude and polarity; whereby when a pulse having the same polarity as the fixed voltage is applied so that the total voltage applied to the heterojunction exceeds a critical point ON, correlated with increasing of said notch electron population over a critical value, the device switches from said OFF state to said ON state; and whereby when a pulse of inverse polarity compared with fixed voltage is applied so that the total voltage applied to said heterojunction decreases below a critical point OFF, correlated with a decrease of said notch electron population below a critical value, the device switches from the ON state to the OFF state.

Claim 11

A semiconductor device according to claim 8, wherein the n-type region and p-type region have close doping levels.

Claim 12

A semiconductor device according to claim 9, wherein doping levels are below 10 16 cm.sup. -3 .

Claim 13

A semiconductor device according to claim 10, wherein there is an abrupt transition from the p-type region to the n-type region and there are no interface states.

Claim 14

A semiconductor device according to claim 10, wherein energy difference between the direct and indirect conduction band minima of p-type semiconductor is small enough to assure the mixing of both bands wave functions in order to describe the localized states.

Claim 15

A semiconductor device according to claim 12, wherein the n-type, and p-type regions are made of semiconductor materials belonging to III x III' 1 -x V or III V x V' 1 -x families which can be direct or indirect materials depending on composition.

Claim 16

A semiconductor device according to claim 13, wherein the n-type region is made of indirect Al x Ga 1 -x As, with x>0.37. and the p-type region is made of direct Al y Ga 1 -y As, with y <0.37.

Claim 17

A bistable memory-effect semiconductor device comprising a semiconductor material body containing a p-n heterojunction and a p-n junction; said heterojunction and said junction having a common p-type region forming a base; said p-n heterojunction being made of two p-type and n-type regions, the n-type region is made of a n-type indirect gap material and the p-type region is made of a p-type direct gap material; the indirect gap of said n-type material is wider than that indirect gap of said p-type material at the corresponding position in wavevector space; the indirect gap conduction band minima in said n-type material are higher in energy than the corresponding indirect gap conduction band minima in said p-type material, at said p-n heterojunction; said heterojunction exhibits a spike-notch structure in the indirect gap conduction band minima and a spike notch structure in the direct gap conduction band minima; said p-n junction allowing direct electron injection in the p-n heterojunction direct notch; said heterojunction providing two mechanisms for electron flow from the n-type region to the p-type region including a slow mechanism and a fast mechanism; the switching from said slow mechanism to said fast mechanism being done by avalanche filling of the direct notch with direct electrons due to the enhancement of the electron-electron interaction; said interaction occurring between indirect electrons injected over the indirect spike and said direct electrons which already exist in the direct notch; said avalanche filling being produced when a critical value of the notch electron population is exceeded; said notch electron population being controlled by current flow through the p-n heterojunction and mainly by direct electrons injected from the p-n junction; the switching from said fast mechanism to said slow mechanism being done by emptying of said direct notch due to attenuation of said electron-electron interaction; said emptying is produced when said notch electron population decreases below a critical value; said notch electron populating being controlled in this case also by current flow through p-n heterojunction and mainly by direct electrons injected from the p-n junction; circuit means for biasing said p-n heterojunction coupled with a load with a fixed external voltage; said circuit means including means for passing control current through said p-n junction; and wherein to said fixed voltage and to said load correspond two stable states ON and OFF; when a critical value ON of the control current, corresponding to said fixed voltage of said load and correlated with a critical value of direct notch electron population, is exceeded, said p-n heterojunction switches to the state ON; and when the control current decreases below a critical value OFF, corresponding to said fixed voltage and said load and correlated with a critical value of direct notch electron population, the p-n heterojunction switches to state OFF.

Claim 18

A bistable memory-effect semiconductor device comprising a semiconductor material body containing a p-n heterojunction and a p-n junction; said heterojunction and said junction having a common p-type region forming a base; said p-n heterojunction being made of two p-type and n-type regions, the n-type region is made of a n-type indirect gap material and the p-type region is made of a p-type direct gap material; the indirect gap of said n-type material is wider than that indirect gap of said p-type material at the corresponding position in wavevector space; the indirect gap conduction band minima in said n-type material are higher in energy than the corresponding indirect gap conduction band minima in said p-type material, at said p-n heterojunction; said heterojunction exhibits a spike-notch structure in the indirect gap conduction band minima and a spike notch structure in the direct gap conduction band minima; said p-n junction allowing direct electron injection in the p-n heterojunction direct notch; said heterojunction providing two mechanisms for electron flow from the n-type region to the p-type region including a slow mechanism and a fast mechanism; the switching from said slow mechanism to said fast mechanism being done by avalanche filling of the direct notch with direct electrons due to the enhancement of the electron-electron interaction; said interaction occurring between indirect electrons injected over the indirect spike and said direct electrons which already exist in the direct notch; said avalanche filling being produced when a critical value of the notch electron population is exceeded; said notch electron population being controlled by current flow through the p-n heterojunction and mainly by direct electrons injected from the p-n junction; the switching from said fast mechanism to said slow mechanism being done by emptying of said direct notch due to attenuation of said electron-electron interaction; said emptying is produced when said notch electron population decreases below a critical value; said notch electron populating being controlled in this case also by current flow through p-n heterojunction and mainly by direct electrons injected from the p-n junction; circuit means for biasing said p-n heterojunction coupled with a load with a fixed external voltage; said circuit means including means for passing control current through said p-n junction; and wherein to said fixed voltage and to said load correspond two stable states ON and OFF; when a critical value ON of the control current, corresponding to said fixed voltage of said load and correlated with a critical value of direct notch electron population, is exceeded, said p-n heterojunction switches to the state ON; and when the control current decreases below a critical value OFF, corresponding to said fixed voltage and said load and correlated with a critical value of direct notch electron population, the p-n heterojunction switches to state OFF.

Claim 19

A semiconductor device according to claim 15, wherein the p-type and n-type regions of said heterojunction have close doping levels.

Claim 20

A semiconductor device according to claim 16, wherein the doping levels of the p-type and n-type regions of the heterojunction are below 10 16 cm.sup. -3 .

Claim 21

A semiconductor device according to claim 17, wherein there is an abrupt transition from the p-type region to the n-type region and there are no interface states.

Claim 22

A semiconductor device according to claim 17, wherein said base is narrow compared with the diffusion length of direct electrons.

Claim 23

A semiconductor device according to claim 19, wherein the energy difference between the direct and indirect conduction band minima of the p-type semiconductor is small enough to assure the mixing of both bands wave functions in order to describe the localized states.

Claim 24

A semiconductor device according to claim 20, wherein the n-type and p-type regions of the heterojunction are made of semiconductor materials belonging to III x III' 1 -x V or III V x V' 1 -x families, which can be direct or indirect materials depending on composition.

Claim 25

A semiconductor device according to claim 21, wherein the n-type region of the heterojunction is made of indirect Al x Ga 1 -x As, with x>0.37, and the p-type region of the heterojunction is made of direct Al y Ga 1 -y As, with y<0.37.

Claim 26

A bistable memory-effect semiconductor device comprising a semiconductor material containing a p-n heterojunction; said heterojunction being made of two n-type and p-type regions; the n-type region is made of a n-type indirect gap material and the p-type region is made of a p-type direct gap material; the indirect gap of said n-type material is wider than that indirect gap of said p-type material at the corresponding position in wavevector space; the indirect gap conduction band minima in said n-type material are higher in energy than the corresponding indirect gap conduction band minima in said p-type material, at said p-n heterojunction; said heterojunction exhibits a spike-notch structure in the indirect gap conduction band minima and a spike-notch structure in the direct gap conduction band minima; said heterojunction providing two mechanisms for electron flow from the n-type region to the p-type, including a slow mechanism and a fast mechanism; the switching from said slow mechanism to said fast mechanism being done by avalanche filling of the direct notch with direct electrons due to the enhancement of the electron-electron interaction; said interaction occurring between indirect electrons injected over the indirect spike and said direct electrons which already exists in the direct notch; said avalanche filling being produced when a critical value of the notch electron population is exceeded; said notch electron population being controlled by the current flow through the p-n heterojunction and mainly by the direct electrons generated by absorption of radiation having a predetermined wavelength; the switching from said fast mechanism to said slow mechanism being done by emptying of said direct notch due to attenuation of said electron-electron interaction; said emptying being produced when said notch electron population decreases below a critical value; said notch electron population being controlled in part by current flow through the p-n heterojunction and mainly by direct electrons optically generated in the notch region; circuit means for biasing said p-n heterojunction coupled with a load with a fixed external voltage; and optical means in order to generate electrons in the direct notch; wherein: to said fixed voltage and said load corresponds two stable states ON and OFF; when a critical value ON of the control luminous flux, corresponding to said fixed voltage and said load and correlated with a critical value of direct notch electron population, is exceeded, said p-n heterojunction switches to the state ON; when the control luminous flux decreases below a critical value OFF, corresponding to said fixed voltage and said load and correlated with a critical value of direct notch electron population, the p-n heterojunction switches to state OFF.

Claim 27

A bistable memory-effect semiconductor device comprising a semiconductor material containing a p-n heterojunction; said heterojunction being made of two n-type and p-type regions; the n-type region is made of a n-type indirect gap material and the p-type region is made of a p-type direct gap material; the indirect gap of said n-type material is wider than that indirect gap of said p-type material at the corresponding position in wavevector space; the indirect gap conduction band minima in said n-type material are higher in energy than the corresponding indirect gap conduction band minima in said p-type material, at said p-n heterojunction; said heterojunction exhibits a spike-notch structure in the indirect gap conduction band minima and a spike-notch structure in the direct gap conduction band minima; said heterojunction providing two mechanisms for electron flow from the n-type region to the p-type, including a slow mechanism and a fast mechanism; the switching from said slow mechanism to said fast mechanism being done by avalanche filling of the direct notch with direct electrons due to the enhancement of the electron-electron interaction; said interaction occurring between indirect electrons injected over the indirect spike and said direct electrons which already exists in the direct notch; said avalanche filling being produced when a critical value of the notch electron population is exceeded; said notch electron population being controlled by the current flow through the p-n heterojunction and mainly by the direct electrons generated by absorption of radiation having a predetermined wavelength; the switching from said fast mechanism to said slow mechanism being done by emptying of said direct notch due to attenuation of said electron-electron interaction; said emptying being produced when said notch electron population decreases below a critical value; said notch electron population being controlled in part by current flow through the p-n heterojunction and mainly by direct electrons optically generated in the notch region; circuit means for biasing said p-n heterojunction coupled with a load with a fixed external voltage; and optical means in order to generate electrons in the direct notch; wherein: to said fixed voltage and said load corresponds two stable states ON and OFF; when a critical value ON of the control luminous flux, corresponding to said fixed voltage and said load and correlated with a critical value of direct notch electron population, is exceeded, said p-n heterojunction switches to the state ON; when the control luminous flux decreases below a critical value OFF, corresponding to said fixed voltage and said load and correlated with a critical value of direct notch electron population, the p-n heterojunction switches to state OFF.

Claim 28

A semiconductor device according to claim 23, wherein the p-type and the n-type regions of said heterojunctions have close doping levels.

Claim 29

A semiconductor device according to claim 24, wherein the doping levels of the p-type and n-type regions are under 10 16 cm.sup. -3 .

Claim 30

A semiconductor device according to claim 25, wherein there is an abrupt transition from the p-type region to the n-type region and there are no interface states.

Claim 31

A semiconductor device according to claim 26, wherein the energy difference between the direct and indirect conduction band minima of the p-type semiconductor is small enough to assure the mixing of both bands wave functions in order to describe the localized state.

Claim 32

A semiconductor device according to claim 27, wherein the control luminous flux having a convenient wavelength can arrive in the notch region the n region by a window effect.

Claim 33

A semiconductor device according to claim 27, wherein the n-type and p-type regions are made of semiconductors materials belonging to III x III' 1 -x V or III V x V' 1 -x families, which can be direct or indirect materials depending on composition.

Claim 34

A semiconductor device according to claim 29, wherein the n-type region is made of indirect Al x Ga 1 -x As, with x >0.37, and the p-type region is made of direct Al y Ga 1 -y As, with y <0.37.

Claim 35

A semiconductor device according to claim 8, wherein the p-type material of said heterojunction is so chosen that the OFF and ON states are optically displayed by light emission due to radiative recombination in the p-type region.

Claim 36

A semiconductor device according to claim 31, wherein the light emitted in the p-type region passes through the n-type region of the heterojunction by a window effect.

Claim 37

A semiconductor device according to claim 8, wherein said circuit means includes photodetectors so that it exhibits electrical isolation between the input and the output.

Claim 38

A semiconductor device according to claim 33, wherein the radiation emitted pass through the n-type region by window effect.

Claim 39

A semiconductor device according to claim 15, wherein said circuit means is connected in a feedback configuration to generate electromagnetic oscillations.

Claim 40

A semiconductor device according to claim 15, wherein the p-type material of said heterojunction is so chosen that the OFF and ON states are optically displayed by light.

Claim 41

A semiconductor device according to claim 36, wherein the light emitted in the p-type region passes through the n-type region of the heterojunction by a window effect.

Claim 42

A semiconductor device according to claim 15, wherein said circuit means includes photodetectors so that it exhibits electrical isolation between the input and the output.

Claim 43

A semiconductor device according to claim 38, wherein the radiation emitted pass through the n-type region by window effect.

Claim 44

A semiconductor device according to claim 23, wherein the p-type material of said heterojunction is so chosen that the OFF and ON states are optically displayed by light emission due to radiative recombination in the p-type region.

Claim 45

A semiconductor device according to claim 40, wherein the light emitted in the p-type region passes through the n-type region of the heterojunction by a window effect.

Claim 46

A semiconductor device according to claim 23, wherein said circuit means includes photodetectors so that it exhibits electrical isolation between the input and the output.

Claim 47

A semiconductor device according to claim 42, wherein the radiation emitted pass through the n-type region by window effect.